ATMEGA64A-AU

@@ -0,0 +1,110 @@+# ATMEGA64A-AU++**Microchip** · Microcontrollers (MCU/MPU/SOC) · TQFP-64(14x14)++ATMEGA64A-AU from Microchip, in a TQFP-64(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PEN | input | Programming Enable for SPI Serial Programming mode. Held low during Power-on Reset to enter SPI programming; internally pulled high. No function during normal operation. |+| 2 | PE0/RXD0/PDI | bidirectional | Port E bit 0. Alt: USART0 RXD receive data input; PDI input for SPI serial programming. |+| 3 | PE1/TXD0/PDO | bidirectional | Port E bit 1. Alt: USART0 TXD transmit data output; PDO output for SPI serial programming. |+| 4 | PE2/XCK0/AIN0 | bidirectional | Port E bit 2. Alt: USART0 external clock (XCK0); Analog Comparator positive input AIN0. |+| 5 | PE3/OC3A/AIN1 | bidirectional | Port E bit 3. Alt: Timer/Counter3 Output Compare A (OC3A); Analog Comparator negative input AIN1. |+| 6 | PE4/OC3B/INT4 | bidirectional | Port E bit 4. Alt: Timer/Counter3 Output Compare B (OC3B); External Interrupt 4. |+| 7 | PE5/OC3C/INT5 | bidirectional | Port E bit 5. Alt: Timer/Counter3 Output Compare C (OC3C); External Interrupt 5. |+| 8 | PE6/T3/INT6 | bidirectional | Port E bit 6. Alt: Timer/Counter3 external clock input T3; External Interrupt 6. |+| 9 | PE7/ICP3/INT7 | bidirectional | Port E bit 7. Alt: Timer/Counter3 Input Capture (ICP3); External Interrupt 7. |+| 10 | PB0/SS | bidirectional | Port B bit 0. Alt: SPI Slave Select input (SS). |+| 11 | PB1/SCK | bidirectional | Port B bit 1. Alt: SPI Serial Clock (SCK). |+| 12 | PB2/MOSI | bidirectional | Port B bit 2. Alt: SPI Master Out / Slave In (MOSI). |+| 13 | PB3/MISO | bidirectional | Port B bit 3. Alt: SPI Master In / Slave Out (MISO). |+| 14 | PB4/OC0 | bidirectional | Port B bit 4. Alt: Timer/Counter0 Output Compare (OC0). |+| 15 | PB5/OC1A | bidirectional | Port B bit 5. Alt: Timer/Counter1 Output Compare A (OC1A). |+| 16 | PB6/OC1B | bidirectional | Port B bit 6. Alt: Timer/Counter1 Output Compare B (OC1B). |+| 17 | PB7/OC2/OC1C | bidirectional | Port B bit 7. Alt: Timer/Counter2 Output Compare (OC2); Timer/Counter1 Output Compare C (OC1C). |+| 18 | PG3/TOSC2 | bidirectional | Port G bit 3. Alt: RTC oscillator pin TOSC2 (32 kHz crystal). |+| 19 | PG4/TOSC1 | bidirectional | Port G bit 4. Alt: RTC oscillator pin TOSC1 (32 kHz crystal). |+| 20 | RESET | input | Active-low reset input. A low level longer than the minimum pulse length generates a reset even if the clock is not running. |+| 21 | VCC | power_in | Digital supply voltage, 2.7-5.5 V. |+| 22 | GND | power_in | Digital ground. |+| 23 | XTAL2 | output | Output from the inverting oscillator amplifier. Connects to external crystal/resonator. |+| 24 | XTAL1 | input | Input to the inverting oscillator amplifier and internal clock operating circuit. |+| 25 | PD0/SCL/INT0 | bidirectional | Port D bit 0. Alt: TWI (I2C) serial clock (SCL); External Interrupt 0. |+| 26 | PD1/SDA/INT1 | bidirectional | Port D bit 1. Alt: TWI (I2C) serial data (SDA); External Interrupt 1. |+| 27 | PD2/RXD1/INT2 | bidirectional | Port D bit 2. Alt: USART1 RXD receive data input; External Interrupt 2. |+| 28 | PD3/TXD1/INT3 | bidirectional | Port D bit 3. Alt: USART1 TXD transmit data output; External Interrupt 3. |+| 29 | PD4/ICP1 | bidirectional | Port D bit 4. Alt: Timer/Counter1 Input Capture (ICP1). |+| 30 | PD5/XCK1 | bidirectional | Port D bit 5. Alt: USART1 external clock (XCK1). |+| 31 | PD6/T1 | bidirectional | Port D bit 6. Alt: Timer/Counter1 external clock input (T1). |+| 32 | PD7/T2 | bidirectional | Port D bit 7. Alt: Timer/Counter2 external clock input (T2). |+| 33 | PG0/WR | bidirectional | Port G bit 0. Alt: External memory interface Write Strobe (WR, active-low). |+| 34 | PG1/RD | bidirectional | Port G bit 1. Alt: External memory interface Read Strobe (RD, active-low). |+| 35 | PC0/A8 | bidirectional | Port C bit 0. Alt: External memory address bus A8. |+| 36 | PC1/A9 | bidirectional | Port C bit 1. Alt: External memory address bus A9. |+| 37 | PC2/A10 | bidirectional | Port C bit 2. Alt: External memory address bus A10. |+| 38 | PC3/A11 | bidirectional | Port C bit 3. Alt: External memory address bus A11. |+| 39 | PC4/A12 | bidirectional | Port C bit 4. Alt: External memory address bus A12. |+| 40 | PC5/A13 | bidirectional | Port C bit 5. Alt: External memory address bus A13. |+| 41 | PC6/A14 | bidirectional | Port C bit 6. Alt: External memory address bus A14. |+| 42 | PC7/A15 | bidirectional | Port C bit 7. Alt: External memory address bus A15. |+| 43 | PG2/ALE | bidirectional | Port G bit 2. Alt: External memory interface Address Latch Enable (ALE). |+| 44 | PA7/AD7 | bidirectional | Port A bit 7. Alt: External memory data/address bus AD7 (multiplexed low-address / data). |+| 45 | PA6/AD6 | bidirectional | Port A bit 6. Alt: External memory data/address bus AD6. |+| 46 | PA5/AD5 | bidirectional | Port A bit 5. Alt: External memory data/address bus AD5. |+| 47 | PA4/AD4 | bidirectional | Port A bit 4. Alt: External memory data/address bus AD4. |+| 48 | PA3/AD3 | bidirectional | Port A bit 3. Alt: External memory data/address bus AD3. |+| 49 | PA2/AD2 | bidirectional | Port A bit 2. Alt: External memory data/address bus AD2. |+| 50 | PA1/AD1 | bidirectional | Port A bit 1. Alt: External memory data/address bus AD1. |+| 51 | PA0/AD0 | bidirectional | Port A bit 0. Alt: External memory data/address bus AD0. |+| 52 | VCC | power_in | Digital supply voltage, 2.7-5.5 V (second VCC pin). |+| 53 | GND | power_in | Digital ground (second GND pin). |+| 54 | PF7/ADC7/TDI | bidirectional | Port F bit 7 / ADC channel 7 analog input / JTAG Test Data In (TDI). Pull-up activated when JTAG enabled. |+| 55 | PF6/ADC6/TDO | bidirectional | Port F bit 6 / ADC channel 6 analog input / JTAG Test Data Out (TDO). TDO is tri-stated unless TAP is shifting out data. |+| 56 | PF5/ADC5/TMS | bidirectional | Port F bit 5 / ADC channel 5 analog input / JTAG Test Mode Select (TMS). Pull-up activated when JTAG enabled. |+| 57 | PF4/ADC4/TCK | bidirectional | Port F bit 4 / ADC channel 4 analog input / JTAG Test Clock (TCK). Pull-up activated when JTAG enabled. |+| 58 | PF3/ADC3 | bidirectional | Port F bit 3 / ADC channel 3 analog input. Digital I/O when ADC not used. |+| 59 | PF2/ADC2 | bidirectional | Port F bit 2 / ADC channel 2 analog input. Digital I/O when ADC not used. |+| 60 | PF1/ADC1 | bidirectional | Port F bit 1 / ADC channel 1 analog input. Digital I/O when ADC not used. |+| 61 | PF0/ADC0 | bidirectional | Port F bit 0 / ADC channel 0 analog input. Digital I/O when ADC not used. |+| 62 | AREF | passive | Analog reference input for the A/D Converter. Bypass to AGND with a capacitor when internal reference is used. |+| 63 | GND | power_in | Analog ground (third GND pin, adjacent to AVCC/AREF). |+| 64 | AVCC | power_in | Analog supply for Port F and the A/D Converter. Externally connect to VCC (through a low-pass filter when the ADC is used), even if ADC is unused. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Microchip |+| Package | TQFP-64(14x14) |+| Category | MCU |+| Pins | 64 |++## Ordering variants++- `ATMEGA64A-AU`+- `ATMEGA64A-AUR`+- `ATMEGA64A-AUAN`+- `ATMEGA64A-AUANR`+- `ATMEGA64A-AUMU`+- `ATMEGA64A-AUMUR`+- `ATMEGA64A-AUMN`+- `ATMEGA64A-AUMNR`++## CAD (KiCad official)++- Symbol: `ATMEGA64A-AU`+- Footprint: `Package_QFP:TQFP-64_14x14mm_P0.8mm`+- 3D model: TQFP-64(14x14) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Microchip datasheet](docs/atmega64a-au-datasheet.pdf) (13 pp, sha256 `33c21a82d91798a5`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/atmega64a-au-datasheet.pdf)