component
AT7456E
Public Made by Adomby adom
ZHONGKEWEI EEPROM, TSSOP-28-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+242−8@@ -1,13 +1,252 @@ {+ "schema_version": 1,+ "type": "component", "slug": "at7456e",+ "title": "AT7456E",+ "brief": "ZHONGKEWEI EEPROM, TSSOP-28-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "ZHONGKEWEI EEPROM, TSSOP-28-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "memory", "at7456e" ],+ "component": {+ "mpn": "AT7456E",+ "manufacturer": "ZHONGKEWEI",+ "package": "TSSOP-28-EP",+ "pin_count": 29,+ "category": "Memory",+ "subcategory": "EEPROM",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/05e3e037fbf1dab52895a7a9e3a9c97c.pdf",+ "parts": {+ "symbol": "at7456e.kicad_sym",+ "footprint": "at7456e.kicad_mod",+ "model_3d": "at7456e.glb",+ "model_3d_step": "at7456e.step",+ "lbr": "at7456e.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "N.C.",+ "type": "unconnected",+ "description": "No connect. Internally floating; leave unconnected."+ },+ {+ "number": "2",+ "name": "N.C.",+ "type": "unconnected",+ "description": "No connect. Internally floating; leave unconnected."+ },+ {+ "number": "3",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital supply input, +3.15 V to +5.25 V (typ +5 V). Bypass with a 0.1 uF capacitor to DGND."+ },+ {+ "number": "4",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground return."+ },+ {+ "number": "5",+ "name": "CLKIN",+ "type": "input",+ "description": "Crystal connection 1 / external clock input. Connect a 27 MHz parallel-resonant crystal between CLKIN and XFB, or drive CLKIN directly with a 27 MHz system reference clock (TTL/logic level)."+ },+ {+ "number": "6",+ "name": "XFB",+ "type": "output",+ "description": "Crystal feedback pin (connection 2). Connect a 27 MHz parallel-resonant crystal between CLKIN and XFB. If CLKIN is driven by an external 27 MHz clock, leave XFB floating."+ },+ {+ "number": "7",+ "name": "CLKOUT",+ "type": "output",+ "description": "27 MHz system-clock buffered logic-level output; used to daisy-chain synchronous timing to additional devices."+ },+ {+ "number": "8",+ "name": "CS",+ "type": "input",+ "description": "SPI chip-select, active-low. When CS is high, SDOUT is tri-stated (high impedance)."+ },+ {+ "number": "9",+ "name": "SDIN",+ "type": "input",+ "description": "SPI serial data input. Data is latched into the input register on the rising edge of SCLK."+ },+ {+ "number": "10",+ "name": "SCLK",+ "type": "input",+ "description": "SPI serial clock input. Provides timing for SDIN capture and SDOUT update. Duty cycle must be between 40% and 60%; max clock ~10 MHz."+ },+ {+ "number": "11",+ "name": "SDOUT",+ "type": "tri_state",+ "description": "SPI serial data output. Data is updated on the falling edge of SCLK. Enters high-impedance state when CS is high."+ },+ {+ "number": "12",+ "name": "LOS",+ "type": "output",+ "description": "Loss-of-sync output, open-drain. Goes high when 32 consecutive line periods of sync are missing on VIN; goes low when 32 consecutive valid sync pulses are detected. Requires a 1 kohm pull-up to DVDD (or another compatible supply)."+ },+ {+ "number": "13",+ "name": "SYNC_IN",+ "type": "input",+ "description": "External composite-sync signal input. Used when VM0[7]=1 to feed an externally separated sync signal into the OSD timing generator."+ },+ {+ "number": "14",+ "name": "N.C.",+ "type": "unconnected",+ "description": "No connect. Internally floating; leave unconnected."+ },+ {+ "number": "15",+ "name": "N.C.",+ "type": "unconnected",+ "description": "No connect. Internally floating; leave unconnected."+ },+ {+ "number": "16",+ "name": "N.C.",+ "type": "unconnected",+ "description": "No connect. Internally floating; leave unconnected."+ },+ {+ "number": "17",+ "name": "VSYNC",+ "type": "output",+ "description": "Vertical-sync output, open-drain, active-low. Asserts low during the vertical-sync period of the video input. Can be recovered from VIN or generated internally in internal-sync mode. Requires a 1 kohm pull-up to DVDD or another compatible supply."+ },+ {+ "number": "18",+ "name": "HSYNC",+ "type": "output",+ "description": "Horizontal-sync output, open-drain, active-low. Asserts low during the horizontal-sync period of the video input. Can be recovered from VIN or generated internally in internal-sync mode. Requires a 1 kohm pull-up to DVDD or another compatible supply."+ },+ {+ "number": "19",+ "name": "RESET",+ "type": "input",+ "description": "System reset input, active-low. Minimum pulse width 1 us. 50 ms after RESET's rising edge, all SPI registers reset to defaults (no register access allowed during this time). 40 us after RESET's rising edge, all display memory cells reset to default value 00H."+ },+ {+ "number": "20",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground return."+ },+ {+ "number": "21",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog supply input, +3.15 V to +5.25 V (typ +5 V). Bypass with a 0.1 uF capacitor to AGND."+ },+ {+ "number": "22",+ "name": "VIN",+ "type": "input",+ "description": "PAL or NTSC CVBS composite-video input. Operating range 0.5 to 1.2 Vp-p (sync-detection range up to 2.0 Vp-p). Should be AC-coupled through 0.1 uF."+ },+ {+ "number": "23",+ "name": "PGND",+ "type": "power_in",+ "description": "Driver (power) ground. Tie to AGND at a single point."+ },+ {+ "number": "24",+ "name": "PVDD",+ "type": "power_in",+ "description": "Video-driver supply input, +3.15 V to +5.25 V (typ +5 V). Bypass with a 0.1 uF capacitor to PGND."+ },+ {+ "number": "25",+ "name": "SAG",+ "type": "input",+ "description": "Sag (voltage-droop) correction input. Used with the output-coupling capacitor network to reduce line-time distortion at low frequencies. If sag correction is not used, connect SAG directly to VOUT."+ },+ {+ "number": "26",+ "name": "VOUT",+ "type": "output",+ "description": "Composite video output. Drives up to two 150 ohm standard video loads; nominal 2 Vp-p swing (max 2.66 Vp-p), gain 2 V/V, bandwidth 6 MHz."+ },+ {+ "number": "27",+ "name": "N.C.",+ "type": "unconnected",+ "description": "No connect. Internally floating; leave unconnected."+ },+ {+ "number": "28",+ "name": "N.C.",+ "type": "unconnected",+ "description": "No connect. Internally floating; leave unconnected."+ },+ {+ "number": "EP",+ "name": "EP",+ "type": "power_in",+ "description": "Exposed thermal pad on the HTSSOP-28 package. Internally connected to AGND. Solder to the AGND copper plane for improved thermal dissipation. Do not use EP as an electrical ground routing node."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/05e3e037fbf1dab52895a7a9e3a9c97c.pdf",+ "pages": 38,+ "sha256": "bc0500dff1b12afb",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 29,+ "described": 29,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "ZHONGKEWEI",+ "Package": "TSSOP-28-EP",+ "Category": "Memory",+ "Pins": "29"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "at7456e"+ ],+ "discovery_pitch": "AT7456E (ZHONGKEWEI) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +264,5 @@ "docs/at7456e-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }