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Initial commit: component/at45db641e-shn-t

Ray ·f2428e3dae ·
2 files changed +185
README.mdadded+44
@@ -0,0 +1,44 @@+# AT45DB641E-SHN-T++**Dialog Semiconductor Adesto Adesto Technologies** · NOR FLASH · SOIC-8-208mil++AT45DB641E-SHN-T from Dialog Semiconductor Adesto Adesto Technologies, in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SI | input | Serial Input pin used for shifting data into the device; all data including command and address sequences are latched on the rising edge of SCK and ignored when the device is deselected (CS deasserted). |+| 2 | SCK | input | Serial Clock pin used to provide clock to the device and control the flow of data to and from the device; command, address, and input data on SI pin are latched on the rising edge of SCK, while output data on SO pin are clocked out on the falling edge of SCK. |+| 3 | RESET | input | Reset pin; a low state will terminate the operation in progress and reset the internal state machine to an idle state; the device will remain in the reset condition as long as a low level is present on this pin and normal operation resumes once the pin is brought back to a high level. |+| 4 | CS | input | Chip Select pin; a high-to-low transition is required to start an operation and a low-to-high transition is required to end an operation; when deasserted (high), the device is placed in standby mode and the SO pin goes to high-impedance state. |+| 5 | SO | tri_state | Serial Output pin used to shift data out from the device; data on the SO pin is always clocked out on the falling edge of SCK and placed in a high-impedance state whenever the device is deselected (CS deasserted). |+| 6 | GND | power_in | Ground reference for the power supply; must be connected to the system ground. |+| 7 | VCC | power_in | Device power supply pin; accepts operating voltage from 1.7V minimum to 3.6V maximum for erase, program, and read operations. |+| 8 | WP | input | Write Protect pin; when asserted (low), all sectors specified for protection by the Sector Protection Register are protected against program and erase operations regardless of software control methods; internally pulled high and may be left floating if hardware protection will not be used. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Dialog Semiconductor Adesto Adesto Technologies |+| Package | SOIC-8-208mil |+| Category | Memory |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `AT45DB641E-SHN-T`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8-208mil (KiCad packages3D, STEP)+- 3D model files: `at45db641e-shn-t-etched.step` / `at45db641e-shn-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `at45db641e-shn-t.step` / `at45db641e-shn-t.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Dialog Semiconductor Adesto Adesto Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893457330933760) (71 pp, sha256 `3162a8930db9136f`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/at45db641e-shn-t-datasheet.pdf)
page.jsonadded+141
@@ -0,0 +1,141 @@+{+  "slug": "at45db641e-shn-t",+  "version": "0.1.0",+  "type": "component",+  "description": "Dialog Semiconductor Adesto Adesto Technologies NOR FLASH, SOIC-8-208mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "memory",+    "at45db641e-shn-t",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "at45db641e-shn-t.kicad_sym",+    "at45db641e-shn-t.kicad_mod",+    "at45db641e-shn-t.glb",+    "at45db641e-shn-t.step",+    "at45db641e-shn-t.lbr",+    "docs/hero.png",+    "docs/at45db641e-shn-t-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "AT45DB641E-SHN-T",+    "manufacturer": "Dialog Semiconductor Adesto Adesto Technologies",+    "package": "SOIC-8-208mil",+    "pin_count": 8,+    "category": "Memory",+    "subcategory": "NOR FLASH",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893457330933760",+    "parts": {+      "symbol": "at45db641e-shn-t.kicad_sym",+      "footprint": "at45db641e-shn-t.kicad_mod",+      "model_3d": "at45db641e-shn-t-etched.glb",+      "model_3d_plain": "at45db641e-shn-t.glb",+      "model_3d_step": "at45db641e-shn-t-etched.step",+      "model_3d_step_plain": "at45db641e-shn-t.step",+      "lbr": "at45db641e-shn-t.lbr"+    },+    "distributor_links": {+      "lcsc": "C2060948"+    },+    "pins": [+      {+        "number": "1",+        "name": "SI",+        "type": "input",+        "description": "Serial Input pin used for shifting data into the device; all data including command and address sequences are latched on the rising edge of SCK and ignored when the device is deselected (CS deasserted)."+      },+      {+        "number": "2",+        "name": "SCK",+        "type": "input",+        "description": "Serial Clock pin used to provide clock to the device and control the flow of data to and from the device; command, address, and input data on SI pin are latched on the rising edge of SCK, while output data on SO pin are clocked out on the falling edge of SCK."+      },+      {+        "number": "3",+        "name": "RESET",+        "type": "input",+        "description": "Reset pin; a low state will terminate the operation in progress and reset the internal state machine to an idle state; the device will remain in the reset condition as long as a low level is present on this pin and normal operation resumes once the pin is brought back to a high level."+      },+      {+        "number": "4",+        "name": "CS",+        "type": "input",+        "description": "Chip Select pin; a high-to-low transition is required to start an operation and a low-to-high transition is required to end an operation; when deasserted (high), the device is placed in standby mode and the SO pin goes to high-impedance state."+      },+      {+        "number": "5",+        "name": "SO",+        "type": "tri_state",+        "description": "Serial Output pin used to shift data out from the device; data on the SO pin is always clocked out on the falling edge of SCK and placed in a high-impedance state whenever the device is deselected (CS deasserted)."+      },+      {+        "number": "6",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference for the power supply; must be connected to the system ground."+      },+      {+        "number": "7",+        "name": "VCC",+        "type": "power_in",+        "description": "Device power supply pin; accepts operating voltage from 1.7V minimum to 3.6V maximum for erase, program, and read operations."+      },+      {+        "number": "8",+        "name": "WP",+        "type": "input",+        "description": "Write Protect pin; when asserted (low), all sectors specified for protection by the Sector Protection Register are protected against program and erase operations regardless of software control methods; internally pulled high and may be left floating if hardware protection will not be used."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 71,+        "cost_usd": 0.4481,+        "at": "2026-09-22T04:55:29"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893457330933760",+        "pages": 71,+        "sha256": "3162a8930db9136f",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file