component
AT45DB041E-SHN-B
Public Made by Adomby adom
Adesto Technologies Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.md+110at45db041e-shn-b-etched.glbat45db041e-shn-b-hero.glbat45db041e-shn-b-hero.overlay.json+260at45db041e-shn-b.glbat45db041e-shn-b.kicad_mod+198at45db041e-shn-b.kicad_sym+45at45db041e-shn-b.lbr+130at45db041e-shn-b.step+2755docs/at45db041e-shn-b-datasheet.pdfdocs/hero.pngpackage.json+243page.json+249viewers/footprint.html+1viewers/symbol.html+1README.mdadded+110@@ -0,0 +1,110 @@+# AT45DB041E-SHN-B++**Adesto Technologies** · Pre-ordered Chips · SOIC-8++AT45DB041E-SHN-B from Adesto Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SI | input | Serial Input: shifts in all commands, addresses and data, latched on the rising edge of SCK and ignored while the device is deselected. |+| 2 | SCK | input | Serial Clock: controls data flow, with input latched on the rising edge and output on SO clocked out on the falling edge of SCK. |+| 3 | RESET | input | Active-low reset: a low level terminates the operation in progress and holds the internal state machine idle; drive high externally if unused. |+| 4 | CS | input | Active-low Chip Select: asserting selects the device, deasserting deselects it into standby (not Deep Power-Down) and puts SO in high-impedance. |+| 5 | WP | input | Active-low Write Protect: protects sectors set in the Sector Protection Register against program/erase; internally pulled high, may float if unused but connecting to VCC is recommended. |+| 6 | VCC | power_in | Device power supply, 1.65V to 3.6V; operation at invalid VCC voltages may produce spurious results. |+| 7 | GND | power_in | Ground reference for the power supply, to be connected to system ground. |+| 8 | SO | tri_state | Serial Output: shifts data out on the falling edge of SCK and is high-impedance whenever the device is deselected. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Adesto Technologies |+| Package | SOIC-8 |+| Category | Interface ICs |+| Pins | 8 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Ultra-Deep Power-Down Current | IUDPD | | 0.4 | 1 | µA | CS= VCC. All other inputs at 0V or VCC | 47 |+| Deep Power-Down Current | IDPD | | 4.5 | 12 | µA | CS= VCC. All other inputs at 0V or VCC | 47 |+| Standby Current | ISB | | 25 | 40 | µA | CS= VCC. All other inputs at 0V or VCC | 47 |+| Active Current, Low Power Read (01h) Operation | ICC1 | | 6 | 9 | mA | f = 1MHz; IOUT = 0mA | 47 |+| Active Current, Low Power Read (01h) Operation | ICC1 | | 7 | 10 | mA | f = 15MHz; IOUT = 0mA | 47 |+| Active Current, Read Operation | ICC2 | | 10 | 12 | mA | f = 50MHz; IOUT = 0mA | 47 |+| Active Current, Read Operation | ICC2 | | 12 | 15 | mA | f = 85MHz; IOUT = 0mA | 47 |+| Active Current, Program Operation | ICC3 | | 14 | 16 | mA | CS=VCC | 47 |+| Active Current, Erase Operation | ICC4 | | 8 | 12 | mA | CS=VCC | 47 |+| Input Load Current | ILI | | | 1 | µA | All inputs at CMOS levels | 47 |+| Output Leakage Current | ILO | | | 1 | µA | All inputs at CMOS levels | 47 |+| Output Low Voltage | VOL | | | 0.4 | V | IOL = 100µA | 47 |+| SCK Frequency | fSCK | | | 70 | MHz | 1.65V to 3.6V | 48 |+| SCK Frequency for Continuous Read (0x0B) | fCAR1 | | | 70 | MHz | 1.65V to 3.6V | 48 |+| SCK Frequency for Continuous Read (0x03) (Low Frequency) | fCAR2 | | | 40 | MHz | 1.65V to 3.6V | 48 |+| SCK Frequency for Continuous Read (Low Power Mode, 01h Opcode) | fCAR3 | | | 15 | MHz | 1.65V to 3.6V | 48 |+| SCK Frequency for Continuous Read (0x1B) | fCAR4 | | | 85 | MHz | 1.65V to 3.6V | 48 |+| SCK High Time | tWH | 4 | | | ns | 1.65V to 3.6V | 48 |+| SCK Low Time | tWL | 4 | | | ns | 1.65V to 3.6V | 48 |+| SCK Rise Time, Peak-to-peak | tSCKR | | | 0.1 | V/ns | 1.65V to 3.6V | 48 |+| SCK Fall Time, Peak-to-peak | tSCKF | | | 0.1 | V/ns | 1.65V to 3.6V | 48 |+| Minimum CS High Time | tCS | 20 | | | ns | 1.65V to 3.6V | 48 |+| CS Setup Time | tCSS | 6 | | | ns | 1.65V to 3.6V | 48 |+| CS Hold Time | tCSH | 5 | | | ns | 1.65V to 3.6V | 48 |+| Data In Setup Time | tSU | 2 | | | ns | 1.65V to 3.6V | 48 |+| Data In Hold Time | tH | 1 | | | ns | 1.65V to 3.6V | 48 |+| Output Hold Time | tHO | 0 | | | ns | 1.65V to 3.6V | 48 |+| Output Disable Time | tDIS | | | 8 | ns | 1.65V to 3.6V | 48 |+| Output Valid | tV | | | 7 | ns | 1.65V to 3.6V | 48 |+| WP Low to Protection Enabled | tWPE | | | 1 | µs | 1.65V to 3.6V | 48 |+| WP High to Protection Disabled | tWPD | | | 1 | µs | 1.65V to 3.6V | 48 |+| Freeze Sector Lockdown Time (from CS High) | tLOCK | | | 200 | µs | 1.65V to 3.6V | 48 |+| CS High to Ultra-Deep Power-Down | tEUDPD | | | 3 | µs | 1.65V to 3.6V | 48 |+| Minimum CS Low Time to Exit Ultra-Deep Power-Down | tCSLU | 20 | | | ns | 1.65V to 3.6V | 48 |+| Exit Ultra-Deep Power-Down Time | tXUDPD | | | 280 | µs | 1.65V to 3.6V | 48 |+| CS High to Deep Power-Down | tEDPD | | | 2 | µs | 1.65V to 3.6V | 48 |+| Resume from Deep Power-Down Time | tRDPD | | | 35 | µs | 1.65V to 3.6V | 48 |+| Page to Buffer Transfer Time | tXFR | | | 100 | µs | 1.65V to 3.6V | 48 |+| RESET Pulse Width | tRST | 10 | | | µs | 1.65V to 3.6V | 48 |+| RESET Recovery Time | tREC | | | 1 | µs | 1.65V to 3.6V | 48 |+| Software Reset Time | tSWRST | | | 35 | µs | 1.65V to 3.6V | 48 |+| Page Erase and Programming Time (256/264 bytes) | tEP | | 10 | 25 | ms | 1.65V to 3.6V | 49 |+| Page Programming Time | tP | | 1.5 | 3 | ms | 1.65V to 3.6V | 49 |+| Byte Programming Time | tBP | | 8 | | µs | 1.65V to 3.6V | 49 |+| Page Erase Time | tPE | | 12 | 25 | ms | 1.65V to 3.6V | 49 |+| Block Erase Time | tBE | | 30 | 35 | ms | 1.65V to 3.6V | 49 |+| Sector Erase Time | tSE | | 0.7 | 1.1 | s | 1.65V to 3.6V | 49 |+| Chip Erase Time | tCE | | 6 | 17 | s | 1.65V to 3.6V | 49 |+| Suspend Time, Program | tSUSP | | 8 | 15 | µs | 1.65V to 3.6V | 49 |+| Suspend Time, Erase | tSUSP | | 20 | 30 | µs | 1.65V to 3.6V | 49 |+| Resume Time, Program | tRES | | 8 | 15 | µs | 1.65V to 3.6V | 49 |+| Resume Time, Erase | tRES | | 20 | 30 | µs | 1.65V to 3.6V | 49 |+| OTP Security Register Program Time | tOTPP | | 200 | 500 | µs | 1.65V to 3.6V | 49 |+| All Output Voltages with Respect to Ground | | -0.6 | | 4.2 | V | Max VCC of 3.6V + 0.6V | 46 |+| All Input Voltages with Respect to Ground (excluding VCC pin, including NC pins) | | -0.6 | | 4.2 | V | Max VCC of 3.6V + 0.6V | 46 |+| Storage Temperature | | -65 | | 150 | C | | 46 |+| Temperature under Bias | | -55 | | 125 | C | | 46 |+| VCC Power Supply | VCC | 1.65 | | 3.6 | V | | 46 |+| Operating Temperature (Case) Industrial | | -40 | | 85 | C | | 46 |++## CAD (KiCad official)++- Symbol: `AT45DB041E-SHN-B`+- Footprint: `Package_SO:SOIC-8_5.3x5.3mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `at45db041e-shn-b-etched.step` / `at45db041e-shn-b-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `at45db041e-shn-b.step` / `at45db041e-shn-b.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Adesto Technologies datasheet](docs/at45db041e-shn-b-datasheet.pdf) (70 pp, sha256 `c630b496f0a3c17a`, retrieved 2026-10-30, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/at45db041e-shn-b-datasheet.pdf)
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at45db041e-shn-b-hero.glbadded⋯ 1 unchanged line ⋯
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Please refer to+ * https://gitlab.com/kicad/libraries/kicad-packages3D/-/blob/master/LICENSE.md for further clarification+ * of the exception.+ *+ * Disclaimer of Warranties and Limitation of Liability.+ * These libraries are provided in the hope that they will be useful, but are provided without warranty of any kind, express or implied.+ * USE 3D CAD DATA AT YOUR OWN RISK+ * DO NOT RELY UPON ANY INFORMATION FOUND HERE WITHOUT INDEPENDENT VERIFICATION.+ */++FILE_DESCRIPTION(+/* description */ ('model of SOIC-8_5.3x5.3mm_P1.27mm'),+/* implementation_level */ '2;1');++FILE_NAME(+/* name */ 'SOIC-8_5.3x5.3mm_P1.27mm.step',+/* time_stamp */ '1970-01-01T00:00:00',+/* author */ ('KiCAD','kicad'),+/* organization */ ('OCCT'),+/* preprocessor_version */ '',+/* originating_system */ 'KiCAD',+/* authorisation */ '');++FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));+ENDSEC;++DATA;+#1=APPLICATION_PROTOCOL_DEFINITION('international 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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "interface ics",+ "at45db041e-shn-b",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "at45db041e-shn-b.kicad_sym",+ "at45db041e-shn-b.kicad_mod",+ "at45db041e-shn-b.glb",+ "at45db041e-shn-b.step",+ "at45db041e-shn-b.lbr",+ "docs/hero.png",+ "docs/at45db041e-shn-b-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "at45db041e-shn-b-hero.glb",+ "at45db041e-shn-b-hero.overlay.json",+ "at45db041e-shn-b-etched.glb"+ ],+ "component": {+ "mpn": "AT45DB041E-SHN-B",+ "manufacturer": "Adesto Technologies",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Interface ICs",+ "subcategory": "Pre-ordered Chips",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/a54d89866f49028299f3782edc4ee94c.pdf",+ "parts": {+ "symbol": "at45db041e-shn-b.kicad_sym",+ "footprint": "at45db041e-shn-b.kicad_mod",+ "model_3d": "at45db041e-shn-b-hero.glb",+ "model_3d_plain": "at45db041e-shn-b-etched.glb",+ "model_3d_step": "at45db041e-shn-b-etched.step",+ "model_3d_step_plain": "at45db041e-shn-b.step",+ "lbr": "at45db041e-shn-b.lbr"+ },+ "distributor_links": {+ "lcsc": "C1348793",+ "digikey": "1265-1066-5-ND",+ "mouser": "988-AT45DB041E-SHN-B"+ },+ "distributor_check": {+ "checked_at": "2026-10-30T22:27:28Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "1265-1066-5-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "988-AT45DB041E-SHN-B",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "SI",+ "type": "input",+ "description": "Serial Input: shifts in all commands, addresses and data, latched on the rising edge of SCK and ignored while the device is deselected."+ },+ {+ "number": "2",+ "name": "SCK",+ "type": "input",+ "description": "Serial Clock: controls data flow, with input latched on the rising edge and output on SO clocked out on the falling edge of SCK."+ },+ {+ "number": "3",+ "name": "RESET",+ "type": "input",+ "description": "Active-low reset: a low level terminates the operation in progress and holds the internal state machine idle; drive high externally if unused."+ },+ {+ "number": "4",+ "name": "CS",+ "type": "input",+ "description": "Active-low Chip Select: asserting selects the device, deasserting deselects it into standby (not Deep Power-Down) and puts SO in high-impedance."+ },+ {+ "number": "5",+ "name": "WP",+ "type": "input",+ "description": "Active-low Write Protect: protects sectors set in the Sector Protection Register against program/erase; internally pulled high, may float if unused but connecting to VCC is recommended."+ },+ {+ "number": "6",+ "name": "VCC",+ "type": "power_in",+ "description": "Device power supply, 1.65V to 3.6V; operation at invalid VCC voltages may produce spurious results."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for the power supply, to be connected to system ground."+ },+ {+ "number": "8",+ "name": "SO",+ "type": "tri_state",+ "description": "Serial Output: shifts data out on the falling edge of SCK and is high-impedance whenever the device is deselected."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The extracted text of the Figure 1-1 SOIC drawing lists the pin labels in an order that does not una; Ordering table (page 63) lists AT45DB041E-SHN-B under package 8S2 (0.208\" wide EIAJ SOIC). Footnote ; The schema has no field for specs, so no headline electrical parameters are included. Supply range ("+ ],+ "pages_sent": 13,+ "cost_usd": 0.0597,+ "at": "2026-10-30T22:27:12"+ },+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/a54d89866f49028299f3782edc4ee94c.pdf",+ "pages": 70,+ "sha256": "c630b496f0a3c17a",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "at45db041e-shn-b.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.8,+ 5.3,+ 2.16+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "121aee742692bb7bc9ef49972786ecb89d1b2d62ab089ed278651a884c800331",+ "checked": "2026-10-30",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "at45db041e-shn-b-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.8,+ 5.3,+ 2.16+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "76cae236a4588095a1dda76d95ad3f0e072ee3d1e57f27aaba9f97035af4f71d",+ "checked": "2026-10-30",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ],+ "package_dims": {+ "package_code": "8S2",+ "source_page": 66,+ "D": {+ "nom_mm": 5.24,+ "range_mm": [+ 5.13,+ 5.35+ ]+ },+ "E1": {+ "nom_mm": 5.29,+ "range_mm": [+ 5.18,+ 5.4+ ]+ },+ "E": {+ "nom_mm": 7.98,+ "range_mm": [+ 7.7,+ 8.26+ ]+ },+ "e": {+ "nom_mm": 1.27,+ "range_mm": [+ null,+ null+ ]+ },+ "A": {+ "nom_mm": 1.93,+ "range_mm": [+ 1.7,+ 2.16+ ]+ },+ "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",+ "model_check": {+ "file": "at45db041e-shn-b.step",+ "verdict": "PASS",+ "reasons": [+ "height and body within the datasheet's package drawing"+ ],+ "by": "factory/package_fit.py"+ }+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}
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