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at25sf161b-sshb-t: factory component page (tier=lcsc)

Ray ·e964c88415 · ·parent b5b0657
1 file changed +116−8
page.json+116−8
@@ -1,13 +1,126 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "at25sf161b-sshb-t",+  "title": "AT25SF161B-SSHB-T",+  "brief": "Dialog Semiconductor Adesto Adesto Technologies NOR FLASH, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Dialog Semiconductor Adesto Adesto Technologies NOR FLASH, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "memory",     "at25sf161b-sshb-t"   ],+  "component": {+    "mpn": "AT25SF161B-SSHB-T",+    "manufacturer": "Dialog Semiconductor Adesto Adesto Technologies",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Memory",+    "subcategory": "NOR FLASH",+    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2311290519_Dialog-Semiconductor-Adesto-Adesto-Technologies-AT25SF161B-SSHB-T_C5555631.pdf",+    "parts": {+      "symbol": "at25sf161b-sshb-t.kicad_sym",+      "footprint": "at25sf161b-sshb-t.kicad_mod",+      "model_3d": "at25sf161b-sshb-t.glb",+      "model_3d_step": "at25sf161b-sshb-t.step",+      "lbr": "at25sf161b-sshb-t.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "CS#",+        "type": "input",+        "description": "Active-low chip select. Asserting CS# (low) selects the device; deasserting (high) puts it in standby. A high-to-low transition starts an operation; low-to-high ends it. A ~10 k\u03a9 pull-up to VCC is recommended for correct power-up ramp."+      },+      {+        "number": "2",+        "name": "SO/IO1",+        "type": "bidirectional",+        "description": "Serial data output in standard SPI; becomes bidirectional IO1 for Dual-SPI and Quad-SPI read/program commands. Data is clocked out on the falling edge of SCK. High-Z when CS# is deasserted."+      },+      {+        "number": "3",+        "name": "WP#/IO2",+        "type": "bidirectional",+        "description": "Active-low hardware write protect for the Status Register when the Quad Enable (QE) bit is 0; becomes bidirectional IO2 when QE=1 for quad-SPI transfers. Internally pulled high - may be left floating if unused."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference for the power supply. Connect to system ground."+      },+      {+        "number": "5",+        "name": "SI/IO0",+        "type": "bidirectional",+        "description": "Serial data input in standard SPI (commands, addresses, write data), latched on the rising edge of SCK. Becomes bidirectional IO0 for Dual- and Quad-SPI read commands. Ignored when CS# is deasserted."+      },+      {+        "number": "6",+        "name": "SCK",+        "type": "input",+        "description": "Serial clock input. Command, address, and input data on SI are latched on the rising edge; output data on SO is clocked out on the falling edge. Supports SPI modes 0 and 3 up to 108 MHz."+      },+      {+        "number": "7",+        "name": "HOLD#/IO3",+        "type": "bidirectional",+        "description": "Active-low HOLD pin (pauses SPI transfer without resetting the clocking sequence) when QE=0; becomes bidirectional IO3 for quad-SPI transfers when QE=1. Internally pulled high - may be left floating if unused."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Device power supply. 2.7 V to 3.6 V for the -B (SSHB) grade. Add a decoupling capacitor near the pin."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2311290519_Dialog-Semiconductor-Adesto-Adesto-Technologies-AT25SF161B-SSHB-T_C5555631.pdf",+        "pages": 61,+        "sha256": "619b98776bb02ba8",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Dialog Semiconductor Adesto Adesto Technologies",+      "Package": "SOIC-8",+      "Category": "Memory",+      "Pins": "8"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "at25sf161b-sshb-t"+  ],+  "discovery_pitch": "AT25SF161B-SSHB-T (Dialog Semiconductor Adesto Adesto Technologies) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +138,5 @@     "docs/at25sf161b-sshb-t-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file