at25df321a-sh-t

@@ -33,5 +33,78 @@   "author": {     "name": "Ray",     "email": "[email protected]"+  },+  "component": {+    "mpn": "AT25DF321A-SH-T",+    "manufacturer": "Dialog Semiconductor Adesto Adesto Technologies",+    "package": "SOIC-8-208mil",+    "pin_count": 8,+    "category": "NOR FLASH",+    "parts": {+      "symbol": "at25df321a-sh-t.kicad_sym",+      "footprint": "at25df321a-sh-t.kicad_mod",+      "model_3d": "at25df321a-sh-t-etched.glb",+      "model_3d_plain": "at25df321a-sh-t.glb",+      "model_3d_step": "at25df321a-sh-t-etched.step",+      "model_3d_step_plain": "at25df321a-sh-t.step",+      "lbr": "at25df321a-sh-t.lbr"+    },+    "pins": [+      {+        "number": "1",+        "name": "CS",+        "type": "input",+        "description": "Chip Select (active low). A high-to-low transition starts an SPI operation; a low-to-high transition ends it. When deasserted, SO is high-impedance and SI data is ignored; the device enters standby (not Deep Power-Down)."+      },+      {+        "number": "2",+        "name": "SO/SOI",+        "type": "bidirectional",+        "description": "Serial Output; data is clocked out on the falling edge of SCK. Becomes an input (SOI) during Dual-Input Byte/Page Program to accept two bits per SCK rising edge with SI. High-impedance whenever CS is deasserted."+      },+      {+        "number": "3",+        "name": "WP",+        "type": "input",+        "description": "Write Protect (active low). Controls hardware locking of protected sectors. Internally pulled high, so it may be left floating if hardware protection is unused, but tying it to VCC is recommended."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference for the device supply. Connect to the system ground."+      },+      {+        "number": "5",+        "name": "SI/SIO",+        "type": "bidirectional",+        "description": "Serial Input; command, address, and data bits are latched on the rising edge of SCK. Becomes an output (SIO) during Dual-Output Read Array, producing two bits per SCK falling edge with SO. Ignored whenever CS is deasserted."+      },+      {+        "number": "6",+        "name": "SCK",+        "type": "input",+        "description": "Serial Clock input. Controls data flow to/from the device: SI is latched on the rising edge, SO is clocked out on the falling edge. Supports SPI Modes 0 and 3 up to 85 MHz (100 MHz in RapidS mode)."+      },+      {+        "number": "7",+        "name": "HOLD",+        "type": "input",+        "description": "Hold (active low). Pauses serial communication without deselecting or resetting the device; while asserted, SCK transitions and SI data are ignored and SO is high-impedance. Internally pulled high; tie to VCC if unused."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Device power supply, 2.7 V to 3.6 V. Powers read, program, and erase operations; no separate programming voltage is required."+      }+    ],+    "provenance": {+      "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }   }-}\ No newline at end of file+}