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at24c512c-sshd-t: factory component page (tier=mfr)

Ray ·17075196b4 · ·parent 4e0178e
1 file changed +116−8
page.json+116−8
@@ -1,13 +1,126 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "at24c512c-sshd-t",+  "title": "AT24C512C-SSHD-T",+  "brief": "Microchip EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Microchip EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "memory",     "at24c512c-sshd-t"   ],+  "component": {+    "mpn": "AT24C512C-SSHD-T",+    "manufacturer": "Microchip",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Memory",+    "subcategory": "EEPROM",+    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/973b932604944454a1e12883ae040947.pdf",+    "parts": {+      "symbol": "at24c512c-sshd-t.kicad_sym",+      "footprint": "at24c512c-sshd-t.kicad_mod",+      "model_3d": "at24c512c-sshd-t.glb",+      "model_3d_step": "at24c512c-sshd-t.step",+      "lbr": "at24c512c-sshd-t.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "A0",+        "type": "input",+        "description": "Device address input bit 0. Hardwired to VCC or GND to set the least-significant bit of the I2C slave address, allowing up to eight AT24C512C devices to share one 2-wire bus. Internally pulled down to GND if left floating, but Atmel recommends tying to a known state (10k\u03a9 or less)."+      },+      {+        "number": "2",+        "name": "A1",+        "type": "input",+        "description": "Device address input bit 1. Hardwired to VCC or GND to help select one of up to eight devices on a shared 2-wire bus. Internally pulled down to GND if left floating; Atmel recommends a hard tie or pull-resistor (10k\u03a9 or less)."+      },+      {+        "number": "3",+        "name": "A2",+        "type": "input",+        "description": "Device address input bit 2 (MSB of the hardware address). Hardwired to VCC or GND for multi-device addressing on a shared 2-wire bus. Internally pulled down to GND if left floating; Atmel recommends a hard tie or pull-resistor (10k\u03a9 or less)."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground / VSS reference for the device."+      },+      {+        "number": "5",+        "name": "SDA",+        "type": "bidirectional",+        "description": "Serial data line for the 2-wire (I2C-compatible) interface. Bidirectional, open-drain (requires an external pull-up to VCC, typically 1.3k\u03a9 at 2.5-5V or 10k\u03a9 at 1.7V per AC spec). May be wire-ORed with any number of other open-drain/open-collector devices. Input capacitance 8pF max."+      },+      {+        "number": "6",+        "name": "SCL",+        "type": "input",+        "description": "Serial clock input for the 2-wire (I2C-compatible) interface. Positive edges clock data into the device, negative edges clock data out. Supports up to 400kHz at 1.7V VCC and up to 1MHz at 2.5-5.5V VCC. Requires external pull-up to VCC."+      },+      {+        "number": "7",+        "name": "WP",+        "type": "input",+        "description": "Write Protect input. When tied to GND, normal write operations are permitted; when tied directly to VCC, all writes to the memory array are inhibited (full-array protection). Internally pulled down to GND if left floating; Atmel recommends a hard tie or 10k\u03a9 or smaller pull resistor."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply voltage. Operating range 1.7V to 3.6V (VCC1 variant) or 2.5V to 5.5V (VCC2 variant). Typical supply currents: 2.0mA (read at 400kHz, 5V) and 3.0mA (write at 400kHz, 5V); standby currents 1-6\u00b5A depending on VCC."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://datasheet.lcsc.com/datasheet/pdf/973b932604944454a1e12883ae040947.pdf",+        "pages": 21,+        "sha256": "9a744ba063c1f9ee",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Microchip",+      "Package": "SOIC-8",+      "Category": "Memory",+      "Pins": "8"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "at24c512c-sshd-t"+  ],+  "discovery_pitch": "AT24C512C-SSHD-T (Microchip) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +138,5 @@     "docs/at24c512c-sshd-t-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file