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at24c32d-sshm-t: factory component page (tier=mfr)

Ray ·6a4931a3ea · ·parent c3fb7e1
1 file changed +116−8
page.json+116−8
@@ -1,13 +1,126 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "at24c32d-sshm-t",+  "title": "AT24C32D-SSHM-T",+  "brief": "Microchip EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Microchip EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "memory",     "at24c32d-sshm-t"   ],+  "component": {+    "mpn": "AT24C32D-SSHM-T",+    "manufacturer": "Microchip",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Memory",+    "subcategory": "EEPROM",+    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/6de020398ba6445484b537e53e124b8b.pdf",+    "parts": {+      "symbol": "at24c32d-sshm-t.kicad_sym",+      "footprint": "at24c32d-sshm-t.kicad_mod",+      "model_3d": "at24c32d-sshm-t.glb",+      "model_3d_step": "at24c32d-sshm-t.step",+      "lbr": "at24c32d-sshm-t.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "A0",+        "type": "input",+        "description": "Device address input bit 0. Hardwired high or low to set the lower bit of the 3-bit hardware slave address, allowing up to eight AT24C32D devices on the same 2-wire bus. Internally pulled to GND if left floating and VCC-plane coupling is <3 pF; Atmel recommends tying to GND when coupling is >3 pF."+      },+      {+        "number": "2",+        "name": "A1",+        "type": "input",+        "description": "Device address input bit 1. Hardwired to set the middle bit of the slave address. Same floating-behavior notes as A0 (internal pull-down to GND when board-VCC coupling is <3 pF)."+      },+      {+        "number": "3",+        "name": "A2",+        "type": "input",+        "description": "Device address input bit 2. Hardwired to set the upper bit of the slave address. Same floating-behavior notes as A0/A1."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V) for supply and all logic signals."+      },+      {+        "number": "5",+        "name": "SDA",+        "type": "bidirectional",+        "description": "Serial data line for the 2-wire (I2C-compatible) interface. Open-drain output; requires an external pull-up resistor to VCC and may be wire-ORed with other open-drain devices. Input capacitance up to 8 pF."+      },+      {+        "number": "6",+        "name": "SCL",+        "type": "input",+        "description": "Serial clock input for the 2-wire interface. Positive edges clock data into the device and negative edges clock data out. Supports up to 400 kHz at 1.7V VCC and up to 1 MHz at 5.0V VCC; Schmitt-trigger and noise-filtered input."+      },+      {+        "number": "7",+        "name": "WP",+        "type": "input",+        "description": "Write Protect input. Tie to GND for normal write operation; tie to VCC to inhibit all writes to the EEPROM array (hardware write protection). Internally pulled to GND if left floating and board-VCC coupling is <3 pF; Atmel recommends tying to GND when coupling is >3 pF."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply, 1.7 V to 5.5 V. Standby current 1.0 uA typ @1.7V (6.0 uA @5.5V); read current 0.4 mA typ and write current 2.0 mA typ at VCC=5.0V, 400 kHz."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://datasheet.lcsc.com/datasheet/pdf/6de020398ba6445484b537e53e124b8b.pdf",+        "pages": 26,+        "sha256": "76d3077e3392f9ed",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Microchip",+      "Package": "SOIC-8",+      "Category": "Memory",+      "Pins": "8"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "at24c32d-sshm-t"+  ],+  "discovery_pitch": "AT24C32D-SSHM-T (Microchip) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +138,5 @@     "docs/at24c32d-sshm-t-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file