at24c04d-sshm-t-tudi

@@ -33,5 +33,78 @@   "author": {     "name": "Ray",     "email": "[email protected]"+  },+  "component": {+    "mpn": "AT24C04D-SSHM-T-TUDI",+    "manufacturer": "Tudi",+    "package": "SOP-8",+    "pin_count": 8,+    "category": "EEPROM",+    "parts": {+      "symbol": "at24c04d-sshm-t-tudi.kicad_sym",+      "footprint": "at24c04d-sshm-t-tudi.kicad_mod",+      "model_3d": "at24c04d-sshm-t-tudi-etched.glb",+      "model_3d_plain": "at24c04d-sshm-t-tudi.glb",+      "model_3d_step": "at24c04d-sshm-t-tudi-etched.step",+      "model_3d_step_plain": "at24c04d-sshm-t-tudi.step",+      "lbr": "at24c04d-sshm-t-tudi.lbr"+    },+    "pins": [+      {+        "number": "1",+        "name": "A0",+        "type": "input",+        "description": "Device address input. On the 4K device (AT24C04) the A0 pin is a no-connect - it is not used for device addressing; the third address bit is used internally as a memory page-address bit. Kept as an input pin on the package for pin-compatibility with the 2K/8K/16K family."+      },+      {+        "number": "2",+        "name": "A1",+        "type": "input",+        "description": "Device address input. On the 4K device, A1 (together with A2) is a hard-wired device-select input that must match the corresponding bit of the I2C device address transmitted by the master. Tie to VCC or GND to set the chip's slave address."+      },+      {+        "number": "3",+        "name": "A2",+        "type": "input",+        "description": "Device address input. On the 4K device, A2 (together with A1) is a hard-wired device-select input that must match the corresponding bit of the I2C device address transmitted by the master. Tie to VCC or GND to set the chip's slave address."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V) for the device supply and all logic-level I/O."+      },+      {+        "number": "5",+        "name": "SDA",+        "type": "bidirectional",+        "description": "I2C serial data line. Bidirectional, open-drain output that must be pulled high with an external resistor to VCC; may be wire-ORed with other open-drain/open-collector devices on the bus. Carries device address, word address, and data during read and write transactions."+      },+      {+        "number": "6",+        "name": "SCL",+        "type": "input",+        "description": "I2C serial clock input. Positive edges clock data into the EEPROM; negative edges clock data out. Schmitt-triggered and filtered for noise suppression. Supports up to 1 MHz at VCC ≥ 2.5V and up to 400 kHz at 1.7V."+      },+      {+        "number": "7",+        "name": "WP",+        "type": "input",+        "description": "Write Protect input for hardware data protection. When tied to GND (or left in the normal-write state) allows normal read/write operations to the full array; when tied to VCC the entire array is write-protected (writes are ignored). Reads are unaffected in either state."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply input. Operating range 1.7 V to 5.5 V. Typical read current 0.14 mA and write current 0.28 mA at 5 V / 400 kHz; standby current ~0.03 µA. Decouple locally with a 0.1 µF ceramic capacitor to GND."+      }+    ],+    "provenance": {+      "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }   }-}\ No newline at end of file+}