component
AT24C02D-SSHM-T
Public Made by Adomby adom
Microchip EEPROM, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+47@@ -0,0 +1,47 @@+# AT24C02D-SSHM-T++**Microchip** · EEPROM · SOIC-8++AT24C02D-SSHM-T from Microchip, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A0 | input | Hardware slave address input bit 0. Tied to VCC or GND to select one of eight device addresses on the I2C bus (forms the least-significant hardware address bit of the 7-bit slave address). Internally weakly pulled to GND when left floating; Atmel recommends driving to a defined level. CMOS input, trip point ~0.5 x VCC. |+| 2 | A1 | input | Hardware slave address input bit 1. Sets bit A1 of the 7-bit I2C slave address so up to eight devices can share one bus. Internally weakly pulled to GND if left floating; connect to VCC or GND for a defined state. |+| 3 | A2 | input | Hardware slave address input bit 2 (MSB of the three hardware address bits). Tie to VCC or GND to select one of eight device addresses on the shared I2C bus. Weak internal pull-down to GND if left unconnected. |+| 4 | GND | power_in | Ground reference for the device. Must be connected to the system ground. |+| 5 | SDA | bidirectional | I2C serial data. Open-drain bidirectional pin; requires an external pull-up resistor (not to exceed 10 kOhm) to VCC. May be wire-ORed with other open-drain / open-collector devices on the same bus. Data is latched into the device on the rising edge of SCL and driven out on the falling edge. |+| 6 | SCL | input | I2C serial clock input from the bus master. Must be pulled high through an external pull-up resistor or driven high when the bus is idle. Command and data present on SDA are latched in on the rising edge of SCL; output data on SDA is clocked out on the falling edge. Supports 400 kHz at 1.7V and 1 MHz at 2.5V. |+| 7 | WP | input | Write Protect. Tie to GND for normal write operations; tie to VCC to inhibit all write operations to the memory array (asserted high). Internally weakly pulled to GND if left floating; Atmel recommends driving to a known state. |+| 8 | VCC | power_in | Device power supply, 1.7V to 3.6V. Operation at invalid VCC voltages may produce spurious results and should not be attempted. Decouple to GND with a local bypass capacitor (typ. 100 nF). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Microchip |+| Package | SOIC-8 |+| Category | Memory |+| Pins | 8 |++## Ordering variants++- `AT24C02D-SSHM-TSSHM-T`++## CAD (KiCad official)++- Symbol: `AT24C02D-SSHM-T`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Microchip datasheet](docs/at24c02d-sshm-t-datasheet.pdf) (26 pp, sha256 `225b24fb78c7ba5a`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/at24c02d-sshm-t-datasheet.pdf)
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