component
at24c02d-sshm-t-tudi
Public Made by Adomby adom
Tudi EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
← Commit history
at24c02d-sshm-t-tudi: restore the component block (pinout + model declarations) from this page's own README and symbol
1 file changed
+74−1
page.json+74−1@@ -33,5 +33,78 @@ "author": { "name": "Ray", "email": "[email protected]"+ },+ "component": {+ "mpn": "AT24C02D-SSHM-T-TUDI",+ "manufacturer": "Tudi",+ "package": "SOP-8",+ "pin_count": 8,+ "category": "EEPROM",+ "parts": {+ "symbol": "at24c02d-sshm-t-tudi.kicad_sym",+ "footprint": "at24c02d-sshm-t-tudi.kicad_mod",+ "model_3d": "at24c02d-sshm-t-tudi-etched.glb",+ "model_3d_plain": "at24c02d-sshm-t-tudi.glb",+ "model_3d_step": "at24c02d-sshm-t-tudi-etched.step",+ "model_3d_step_plain": "at24c02d-sshm-t-tudi.step",+ "lbr": "at24c02d-sshm-t-tudi.lbr"+ },+ "pins": [+ {+ "number": "1",+ "name": "A0",+ "type": "input",+ "description": "Device address input bit 0. Hard-wired to VCC or GND to set the lower bit of the I2C slave address (1010_A2A1A0_R/W), allowing up to 8 devices on one bus. Internally biased low if left floating."+ },+ {+ "number": "2",+ "name": "A1",+ "type": "input",+ "description": "Device address input bit 1. Hard-wired to VCC or GND to set the middle bit of the I2C slave address. Internally biased low if left floating."+ },+ {+ "number": "3",+ "name": "A2",+ "type": "input",+ "description": "Device address input bit 2. Hard-wired to VCC or GND to set the upper user-selectable bit of the I2C slave address. Internally biased low if left floating."+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for the device."+ },+ {+ "number": "5",+ "name": "SDA",+ "type": "bidirectional",+ "description": "I2C serial data (bidirectional, open-drain). Requires an external pull-up resistor to VCC and may be wire-ORed with other open-drain devices on the bus."+ },+ {+ "number": "6",+ "name": "SCL",+ "type": "input",+ "description": "I2C serial clock input. Data is clocked into the EEPROM on the positive edge and out of the EEPROM on the negative edge. Supports up to 1 MHz at VCC >= 2.5V (400 kHz at VCC >= 1.7V)."+ },+ {+ "number": "7",+ "name": "WP",+ "type": "input",+ "description": "Write-protect input. Tie to GND for normal read/write operation; tie to VCC to hardware write-protect the full 2K array."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Power supply input, 1.7V to 5.5V (2.5V to 5.5V for 1 MHz operation). Typical read current 0.14 mA @400 kHz, write current 0.28 mA, standby current ~0.03 uA."+ }+ ],+ "provenance": {+ "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ } }-}+}