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at24c01c-sshm-t-tudi: restore the component block (pinout + model declarations) from this page's own README and symbol

Ray ·abaa18e2a3 · ·parent e2ddfc3
1 file changed +74−1
page.json+74−1
@@ -33,5 +33,78 @@   "author": {     "name": "Ray",     "email": "[email protected]"+  },+  "component": {+    "mpn": "AT24C01C-SSHM-T-TUDI",+    "manufacturer": "Tudi",+    "package": "SOP-8",+    "pin_count": 8,+    "category": "EEPROM",+    "parts": {+      "symbol": "at24c01c-sshm-t-tudi.kicad_sym",+      "footprint": "at24c01c-sshm-t-tudi.kicad_mod",+      "model_3d": "at24c01c-sshm-t-tudi-etched.glb",+      "model_3d_plain": "at24c01c-sshm-t-tudi.glb",+      "model_3d_step": "at24c01c-sshm-t-tudi-etched.step",+      "model_3d_step_plain": "at24c01c-sshm-t-tudi.step",+      "lbr": "at24c01c-sshm-t-tudi.lbr"+    },+    "pins": [+      {+        "number": "1",+        "name": "A0",+        "type": "input",+        "description": "Device address input bit 0. Hardwired to VCC or GND to set the least-significant bit of the I2C slave address, allowing up to 8 devices on one bus. Internal biasing pulls the pin toward logic low if left floating, but tying to a defined level is recommended."+      },+      {+        "number": "2",+        "name": "A1",+        "type": "input",+        "description": "Device address input bit 1. Hardwired to VCC or GND to set bit 1 of the I2C slave address. Internal proprietary bias defaults the pin low if floated."+      },+      {+        "number": "3",+        "name": "A2",+        "type": "input",+        "description": "Device address input bit 2. Hardwired to VCC or GND to set the most-significant of the 3 device-address bits (bits form '1010 A2 A1 A0 R/W'). Internal proprietary bias defaults the pin low if floated."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V) for the device supply and I/O signals."+      },+      {+        "number": "5",+        "name": "SDA",+        "type": "bidirectional",+        "description": "I2C serial data line. Open-drain bidirectional pin used for address and data transfer; requires an external pull-up resistor to VCC and may be wire-ORed with other open-drain devices. Input/output capacitance ≤8 pF."+      },+      {+        "number": "6",+        "name": "SCL",+        "type": "input",+        "description": "I2C serial clock input. Positive edge clocks data into the EEPROM; negative edge clocks data out. Maximum clock frequency is 1 MHz (VCC ≥ 2.5 V) or 400 kHz (VCC ≥ 1.7 V). Input capacitance ≤6 pF."+      },+      {+        "number": "7",+        "name": "WP",+        "type": "input",+        "description": "Write protect input. Tie to GND for normal read/write operation; tie to VCC to write-protect the entire 1K array in hardware."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply voltage. Operating range 1.7 V to 5.5 V @ 400 kHz, or 2.5 V to 5.5 V @ 1 MHz. Typical standby current ISB ≈ 30 nA; read/write currents 0.14 mA / 0.28 mA typical at 5 V, 400 kHz."+      }+    ],+    "provenance": {+      "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }   }-}\ No newline at end of file+}