component
AS179-92LF
Public Made by Adomby adom
Skyworks Solutions Analog Switches, Multiplexers, SC-70-6(SOT-363). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C83422). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+28−8
as179-92lf.lbr+20−2@@ -60,6 +60,18 @@ <smd name="4" x="0.8375" y="-0.6500" dx="1.0250" dy="0.3500" layer="1"/> <smd name="5" x="0.8375" y="-0.0000" dx="1.0250" dy="0.3500" layer="1"/> <smd name="6" x="0.8375" y="0.6500" dx="1.0250" dy="0.3500" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-1.1800" y="1.0900"/>+ <vertex x="-1.3200" y="1.2800"/>+ <vertex x="-1.0400" y="1.2800"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.3125" y="1.0000"/>+ <vertex x="0.6250" y="1.0000"/>+ <vertex x="0.6250" y="-1.0000"/>+ <vertex x="-0.6250" y="-1.0000"/>+ <vertex x="-0.6250" y="0.6875"/>+ </polygon> <wire x1="-0.7350" y1="1.1100" x2="0.7350" y2="1.1100" width="0.1200" layer="21"/> <wire x1="-0.7350" y1="1.0850" x2="-0.7350" y2="1.1100" width="0.1200" layer="21"/> <wire x1="-0.7350" y1="-1.1100" x2="-0.7350" y2="-1.0850" width="0.1200" layer="21"/>@@ -68,7 +80,7 @@ <wire x1="0.7350" y1="-1.1100" x2="-0.7350" y2="-1.1100" width="0.1200" layer="21"/> <text x="0" y="1.763" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-1.763" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-1.1800" y="1.0900"/><vertex x="-1.3200" y="1.2800"/><vertex x="-1.0400" y="1.2800"/></polygon></package>+</package> </packages> <symbols> <symbol name="AS179-92LF">@@ -102,7 +114,13 @@ <connect gate="G$1" pin="J1" pad="5"/> <connect gate="G$1" pin="V1" pad="4"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="AS179-92LF" constant="no"/>+ <attribute name="MANUFACTURER" value="Skyworks Solutions" constant="no"/>+ <attribute name="LCSC_PN" value="C83422" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+8−6@@ -26,13 +26,15 @@ "model_3d_step": "as179-92lf.step", "lbr": "as179-92lf.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C83422"+ }, "pins": [ { "number": "1", "name": "J3", "type": "passive",- "description": "RF port J3. One of the two 'throw' RF ports of the SPDT switch; 50 Ω characteristic impedance. Requires a 100 pF DC-blocking capacitor for >500 MHz operation (larger values for lower frequencies)."+ "description": "RF port J3. One of the two 'throw' RF ports of the SPDT switch; 50 \u03a9 characteristic impedance. Requires a 100 pF DC-blocking capacitor for >500 MHz operation (larger values for lower frequencies)." }, { "number": "2",@@ -44,25 +46,25 @@ "number": "3", "name": "J2", "type": "passive",- "description": "RF port J2. The other 'throw' RF port of the SPDT switch; 50 Ω characteristic impedance. Requires a 100 pF DC-blocking capacitor for >500 MHz operation (larger values for lower frequencies)."+ "description": "RF port J2. The other 'throw' RF port of the SPDT switch; 50 \u03a9 characteristic impedance. Requires a 100 pF DC-blocking capacitor for >500 MHz operation (larger values for lower frequencies)." }, { "number": "4", "name": "V1", "type": "input",- "description": "DC control voltage input V1. Complementary control with V2 selects the active RF path. VCTL low = 0 to 0.2 V (@ 20 μA max); VCTL high = 2.0 V (@ 100 μA max) or 5.0 V (@ 200 μA max). Absolute maximum range -1.2 V to +8.0 V."+ "description": "DC control voltage input V1. Complementary control with V2 selects the active RF path. VCTL low = 0 to 0.2 V (@ 20 \u03bcA max); VCTL high = 2.0 V (@ 100 \u03bcA max) or 5.0 V (@ 200 \u03bcA max). Absolute maximum range -1.2 V to +8.0 V." }, { "number": "5", "name": "J1", "type": "passive",- "description": "RF common port J1 (the 'pole' of the SPDT). Routed to either J2 or J3 depending on the V1/V2 control state; 50 Ω characteristic impedance. Requires a 100 pF DC-blocking capacitor for >500 MHz operation."+ "description": "RF common port J1 (the 'pole' of the SPDT). Routed to either J2 or J3 depending on the V1/V2 control state; 50 \u03a9 characteristic impedance. Requires a 100 pF DC-blocking capacitor for >500 MHz operation." }, { "number": "6", "name": "V2", "type": "input",- "description": "DC control voltage input V2. Complementary control with V1 selects the active RF path. VCTL low = 0 to 0.2 V (@ 20 μA max); VCTL high = 2.0 V (@ 100 μA max) or 5.0 V (@ 200 μA max). Absolute maximum range -1.2 V to +8.0 V."+ "description": "DC control voltage input V2. Complementary control with V1 selects the active RF path. VCTL low = 0 to 0.2 V (@ 20 \u03bcA max); VCTL high = 2.0 V (@ 100 \u03bcA max) or 5.0 V (@ 200 \u03bcA max). Absolute maximum range -1.2 V to +8.0 V." } ], "provenance": {