← Commit history

Publish 0.2.0

Ray ·ba6a30fb4a · ·parent 7f15f50
3 files changed +25−11
README.md+14
@@ -34,6 +34,20 @@ AS169-73LF from Skyworks Solutions, in a SOT-23-6. Pinout and pin descriptions e - Footprint: `Package_TO_SOT_SMD:SOT-23-6` - 3D model: SOT-23-6 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`as169-73lf.step`](as169-73lf.step) | 97 KB | You want the bare part, or you mark your own boards. |+| [`as169-73lf-etched.step`](as169-73lf-etched.step) | 1.8 MB | You want the part with `AS169-73LF` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 445 faces against 117 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance  Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1
@@ -1,6 +1,6 @@ {   "slug": "as169-73lf",-  "version": "0.1.0",+  "version": "0.2.0",   "type": "component",   "description": "Skyworks Solutions Analog Switches, Multiplexers, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "tags": [
page.json+10−10
@@ -4,7 +4,7 @@   "slug": "as169-73lf",   "title": "AS169-73LF",   "brief": "Skyworks Solutions Analog Switches, Multiplexers, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.2.0",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -34,7 +34,7 @@         "number": "1",         "name": "J3",         "type": "passive",-        "description": "RF port J3 (throw 2). 50 \u03a9 RF port; requires an external DC-blocking capacitor (CBL = 100 pF for operation >500 MHz) for positive-voltage operation. Connected to the common port J1 when V2 = HIGH and V1 = LOW."+        "description": "RF port J3 (throw 2). 50 Ω RF port; requires an external DC-blocking capacitor (CBL = 100 pF for operation >500 MHz) for positive-voltage operation. Connected to the common port J1 when V2 = HIGH and V1 = LOW."       },       {         "number": "2",@@ -46,25 +46,25 @@         "number": "3",         "name": "J2",         "type": "passive",-        "description": "RF port J2 (throw 1). 50 \u03a9 RF port; requires an external DC-blocking capacitor (CBL = 100 pF for operation >500 MHz) for positive-voltage operation. Connected to the common port J1 when V1 = HIGH and V2 = LOW."+        "description": "RF port J2 (throw 1). 50 Ω RF port; requires an external DC-blocking capacitor (CBL = 100 pF for operation >500 MHz) for positive-voltage operation. Connected to the common port J1 when V1 = HIGH and V2 = LOW."       },       {         "number": "4",         "name": "V1",         "type": "input",-        "description": "Digital control voltage 1 (complement of V2). VLOW = 0 to 0.2 V @ 20 \u00b5A max, VHIGH = 3 V @ 100 \u00b5A max to 5 V @ 200 \u00b5A max. When V1 = HIGH and V2 = LOW, J1\u2194J2 is in insertion-loss (through) state."+        "description": "Digital control voltage 1 (complement of V2). VLOW = 0 to 0.2 V @ 20 µA max, VHIGH = 3 V @ 100 µA max to 5 V @ 200 µA max. When V1 = HIGH and V2 = LOW, J1↔J2 is in insertion-loss (through) state."       },       {         "number": "5",         "name": "J1",         "type": "passive",-        "description": "Common RF port J1 (pole). 50 \u03a9 RF port; requires an external DC-blocking capacitor (CBL = 100 pF for operation >500 MHz) for positive-voltage operation. Routed to either J2 or J3 based on the V1/V2 control state."+        "description": "Common RF port J1 (pole). 50 Ω RF port; requires an external DC-blocking capacitor (CBL = 100 pF for operation >500 MHz) for positive-voltage operation. Routed to either J2 or J3 based on the V1/V2 control state."       },       {         "number": "6",         "name": "V2",         "type": "input",-        "description": "Digital control voltage 2 (complement of V1). VLOW = 0 to 0.2 V @ 20 \u00b5A max, VHIGH = 3 V @ 100 \u00b5A max to 5 V @ 200 \u00b5A max. When V2 = HIGH and V1 = LOW, J1\u2194J3 is in insertion-loss (through) state."+        "description": "Digital control voltage 2 (complement of V1). VLOW = 0 to 0.2 V @ 20 µA max, VHIGH = 3 V @ 100 µA max to 5 V @ 200 µA max. When V2 = HIGH and V1 = LOW, J1↔J3 is in insertion-loss (through) state."       }     ],     "provenance": {@@ -138,9 +138,9 @@     "docs/hero.png",     "docs/as169-73lf-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ],-  "visibility": {-    "public": true-  }+  "visibility": "public",+  "description": "Skyworks Solutions Analog Switches, Multiplexers, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D." }\ No newline at end of file