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APL5934DKAI-TRG
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Anpec Elec Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+122−8@@ -1,13 +1,132 @@ {+ "schema_version": 1,+ "type": "component", "slug": "apl5934dkai-trg",+ "title": "APL5934DKAI-TRG",+ "brief": "Anpec Elec Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Anpec Elec Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "pmic", "apl5934dkai-trg" ],+ "component": {+ "mpn": "APL5934DKAI-TRG",+ "manufacturer": "Anpec Elec",+ "package": "SOP-8-EP",+ "pin_count": 9,+ "category": "PMIC",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/aacb134ec3a0323a588212ed907964a2.pdf",+ "parts": {+ "symbol": "apl5934dkai-trg.kicad_sym",+ "footprint": "apl5934dkai-trg.kicad_mod",+ "model_3d": "apl5934dkai-trg.glb",+ "model_3d_step": "apl5934dkai-trg.step",+ "lbr": "apl5934dkai-trg.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "POK",+ "type": "output",+ "description": "Power-OK signal output. Open-drain output that indicates the status of VOUT by sensing the FB voltage; pulled low when VOUT is outside the Power-OK window (rising POK threshold ~92% of nominal VFB, POK pull-low voltage ~0.25V at 5mA sink). Requires an external pull-up resistor."+ },+ {+ "number": "2",+ "name": "EN",+ "type": "input",+ "description": "Active-high enable control pin. Holding EN below the enable threshold (~0.8V typical) shuts down the output; re-enabling triggers a new soft-start cycle. An internal ~3\u00b5A pull-low current pulls EN low when left open (initial-off for the /D variant), disabling the regulator by default."+ },+ {+ "number": "3",+ "name": "VIN",+ "type": "power_in",+ "description": "Main power supply input (1.2V ~ 5.5V) used for voltage conversion to VOUT. A \u226510\u00b5F decoupling capacitor is recommended close to this pin to filter noise and improve transient response. The voltage on VIN is monitored by the Power-On-Reset circuit (rising VIN POR threshold ~0.9V)."+ },+ {+ "number": "4",+ "name": "VCNTL",+ "type": "power_in",+ "description": "Bias voltage input for the internal control circuitry (3.0V ~ 5.5V, +5V recommended). A 0.1\u00b5F decoupling capacitor is typically connected near this pin. VCNTL is also monitored by the Power-On-Reset circuit (rising VCNTL POR threshold ~2.7V)."+ },+ {+ "number": "5",+ "name": "NC",+ "type": "unconnected",+ "description": "No Connection. Leave this pin floating or tie to a convenient net; it has no internal function on the APL5934B/D SOP-8P package."+ },+ {+ "number": "6",+ "name": "VOUT",+ "type": "power_out",+ "description": "Regulated output pin (0.8V to VIN\u2212VDROP, up to 3A continuous / 4A peak). Requires a minimum 10\u00b5F output capacitor (MLCC applicable) for stability and transient response; total COUT scales with load per the datasheet (8-1100\u00b5F at 3A). During shutdown an internal ~85\u03a9 pull-down MOSFET quickly discharges VOUT."+ },+ {+ "number": "7",+ "name": "FB",+ "type": "input",+ "description": "Voltage feedback pin. Connect to the tap of an external resistor divider from VOUT to set the output voltage against the 0.8V internal reference (VOUT = 0.8V \u00d7 (1 + R1/R2)). FB input current is \u00b1100nA max."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference pin for all internal circuitry. All voltage levels are measured with respect to this pin."+ },+ {+ "number": "EP",+ "name": "GND",+ "type": "power_in",+ "description": "Exposed thermal pad on the underside of the SOP-8P package. Connect to the system ground plane with a large copper area for heat dissipation into the ambient air."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/aacb134ec3a0323a588212ed907964a2.pdf",+ "pages": 24,+ "sha256": "c5a85a00361edb6c",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 9,+ "described": 9,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Anpec Elec",+ "Package": "SOP-8-EP",+ "Category": "PMIC",+ "Pins": "9"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "apl5934dkai-trg"+ ],+ "discovery_pitch": "APL5934DKAI-TRG (Anpec Elec) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +144,5 @@ "docs/apl5934dkai-trg-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }