component
AP64350SP-13
Public Made by Adomby adom
Diodes Incorporated DC-DC Converters, SO-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
fix footprint: SOIC-8_3.9x4.9mm_P1.27mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm (symbol has pins 1,2,3,4,5,6,7,8,9; the old footprint left pad(s) with no net)
4 files changed
+109−55
ap64350sp-13.kicad_mod+35−4@@ -1,8 +1,8 @@-(footprint "SOIC-8_3.9x4.9mm_P1.27mm"+(footprint "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm" (version 20260206) (generator "kicad-footprint-generator") (layer "F.Cu")- (descr "SOIC, 8 Pin (JEDEC MS-012AA, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_8.pdf)")+ (descr "SOIC, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ada4898-1_4898-2.pdf#page=29)") (tags "SOIC SO") (property "Reference" "REF**" (at 0 -3.4 0)@@ -14,7 +14,7 @@ ) ) )- (property "Value" "SOIC-8_3.9x4.9mm_P1.27mm"+ (property "Value" "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm" (at 0 3.4 0) (layer "F.Fab") (effects@@ -237,6 +237,30 @@ ) ) )+ (pad "" smd roundrect+ (at -0.57 -0.75)+ (size 0.92 1.21)+ (layers "F.Paste")+ (roundrect_rratio 0.25)+ )+ (pad "" smd roundrect+ (at -0.57 0.75)+ (size 0.92 1.21)+ (layers "F.Paste")+ (roundrect_rratio 0.25)+ )+ (pad "" smd roundrect+ (at 0.57 -0.75)+ (size 0.92 1.21)+ (layers "F.Paste")+ (roundrect_rratio 0.25)+ )+ (pad "" smd roundrect+ (at 0.57 0.75)+ (size 0.92 1.21)+ (layers "F.Paste")+ (roundrect_rratio 0.25)+ ) (pad "1" smd roundrect (at -2.475 -1.905) (size 1.95 0.6)@@ -285,8 +309,15 @@ (layers "F.Cu" "F.Mask" "F.Paste") (roundrect_rratio 0.25) )+ (pad "9" smd rect+ (at 0 0)+ (size 2.29 3)+ (property pad_prop_heatsink)+ (layers "F.Cu" "F.Mask")+ (zone_connect 2)+ ) (embedded_fonts no)- (model "${KICAD10_3DMODEL_DIR}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.step"+ (model "${KICAD10_3DMODEL_DIR}/Package_SO.3dshapes/SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.step" (offset (xyz 0 0 0) )
ap64350sp-13.lbr+33−30@@ -50,10 +50,10 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description>SOIC-8_3.9x4.9mm_P1.27mm (symbol synthesized from footprint pads)</description>+<description></description> <packages>-<package name="SOIC-8_3.9x4.9mm_P1.27mm">- <description>SOIC-8_3.9x4.9mm_P1.27mm</description>+<package name="AP64350SP-13">+ <description>AP64350SP-13</description> <smd name="1" x="-2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/> <smd name="2" x="-2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/> <smd name="3" x="-2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/>@@ -62,6 +62,7 @@ <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/> <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/> <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>+ <smd name="9" x="0.0000" y="-0.0000" dx="2.2900" dy="3.0000" layer="1"/> <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>@@ -73,40 +74,42 @@ <!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package> </packages> <symbols>-<symbol name="SOIC-8_3.9x4.9mm_P1.27mm">- <wire x1="-7.62" y1="6.35" x2="7.62" y2="6.35" width="0.254" layer="94"/>- <wire x1="7.62" y1="6.35" x2="7.62" y2="-6.35" width="0.254" layer="94"/>- <wire x1="7.62" y1="-6.35" x2="-7.62" y2="-6.35" width="0.254" layer="94"/>- <wire x1="-7.62" y1="-6.35" x2="-7.62" y2="6.35" width="0.254" layer="94"/>- <text x="0" y="8.89" size="1.27" layer="95" align="bottom-center">>NAME</text>- <text x="0" y="-8.89" size="1.27" layer="96" align="top-center">>VALUE</text>- <pin name="1" x="-12.7" y="5.08" length="short" direction="pas"/>- <pin name="2" x="-12.7" y="2.54" length="short" direction="pas"/>- <pin name="3" x="-12.7" y="0" length="short" direction="pas"/>- <pin name="4" x="-12.7" y="-2.54" length="short" direction="pas"/>- <pin name="5" x="12.7" y="5.08" length="short" direction="pas" rot="R180"/>- <pin name="6" x="12.7" y="2.54" length="short" direction="pas" rot="R180"/>- <pin name="7" x="12.7" y="0" length="short" direction="pas" rot="R180"/>- <pin name="8" x="12.7" y="-2.54" length="short" direction="pas" rot="R180"/>+<symbol name="AP64350SP-13">+ <wire x1="-12.7" y1="7.62" x2="12.7" y2="7.62" width="0.254" layer="94"/>+ <wire x1="12.7" y1="7.62" x2="12.7" y2="-7.62" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-7.62" x2="-12.7" y2="-7.62" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-7.62" x2="-12.7" y2="7.62" width="0.254" layer="94"/>+ <text x="0" y="10.16" size="1.27" layer="95" align="bottom-center">>NAME</text>+ <text x="0" y="-10.16" size="1.27" layer="96" align="top-center">>VALUE</text>+ <pin name="BST" x="-17.78" y="5.08" length="middle" direction="pas"/>+ <pin name="VIN" x="-17.78" y="2.54" length="middle" direction="pwr"/>+ <pin name="EN" x="-17.78" y="0" length="middle" direction="in"/>+ <pin name="RT/CLK" x="-17.78" y="-2.54" length="middle" direction="io"/>+ <pin name="FB" x="-17.78" y="-5.08" length="middle" direction="in"/>+ <pin name="EXPOSED PAD" x="17.78" y="2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="SW" x="17.78" y="0" length="middle" direction="out" rot="R180"/>+ <pin name="GND" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="COMP" x="17.78" y="-5.08" length="middle" direction="out" rot="R180"/> </symbol> </symbols> <devicesets>-<deviceset name="SOIC-8_3.9x4.9mm_P1.27mm" prefix="U">- <description>SOIC-8_3.9x4.9mm_P1.27mm (symbol synthesized from footprint pads)</description>+<deviceset name="AP64350SP-13" prefix="U">+ <description></description> <gates>- <gate name="G$1" symbol="SOIC-8_3.9x4.9mm_P1.27mm" x="0" y="0"/>+ <gate name="G$1" symbol="AP64350SP-13" x="0" y="0"/> </gates> <devices>- <device name="" package="SOIC-8_3.9x4.9mm_P1.27mm">+ <device name="" package="AP64350SP-13"> <connects>- <connect gate="G$1" pin="1" pad="1"/>- <connect gate="G$1" pin="2" pad="2"/>- <connect gate="G$1" pin="3" pad="3"/>- <connect gate="G$1" pin="4" pad="4"/>- <connect gate="G$1" pin="5" pad="5"/>- <connect gate="G$1" pin="6" pad="6"/>- <connect gate="G$1" pin="7" pad="7"/>- <connect gate="G$1" pin="8" pad="8"/>+ <connect gate="G$1" pin="BST" pad="1"/>+ <connect gate="G$1" pin="VIN" pad="2"/>+ <connect gate="G$1" pin="EN" pad="3"/>+ <connect gate="G$1" pin="RT/CLK" pad="4"/>+ <connect gate="G$1" pin="FB" pad="5"/>+ <connect gate="G$1" pin="EXPOSED PAD" pad="9"/>+ <connect gate="G$1" pin="SW" pad="8"/>+ <connect gate="G$1" pin="GND" pad="7"/>+ <connect gate="G$1" pin="COMP" pad="6"/> </connects> <technologies><technology name=""/></technologies> </device>
pads.json+40−20@@ -1,9 +1,9 @@ { "schema": "adom.pads/1", "slug": "ap64350sp-13",- "footprint": "SOIC-8_3.9x4.9mm_P1.27mm",+ "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm", "generated_from": {- "footprint": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",+ "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm@sha256:a7971720bdda0353", "pins": "page.json:component.pins", "overrides": null },@@ -15,17 +15,11 @@ ], "corner": "top-left", "source": "silk-marker",- "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4"+ "derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm@sha256:a7971720bdda0353" },- "pad_count": 8,- "paste_apertures": 0,- "issues": [- {- "kind": "pin-has-no-pad",- "pin": "9",- "detail": "page.json declares pin \"9\" but the footprint has no such pad"- }- ],+ "pad_count": 9,+ "paste_apertures": 4,+ "issues": [], "pads": [ { "pad": "1",@@ -52,7 +46,7 @@ "description": "High-Side Gate Drive Boost Input. BST supplies the drive for the high-side n-channel power MOSFET. A 100nF capacitor is recommended from BST to SW to power the high-side driver.", "is_pin1": true, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -82,7 +76,7 @@ "description": "Power Input. VIN supplies the power to the IC as well as the step-down converter power MOSFETs. Drive VIN with a 3.8V to 40V power source. Bypass VIN to GND with a suitably large capacitor to eliminate noise due to the switching of the IC.", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -112,7 +106,7 @@ "description": "Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator and low to turn it off. Connect to VIN or leave floating for automatic startup. The EN has a precision threshold of 1.18V for programming the UVLO.", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -142,7 +136,7 @@ "description": "Resistor Timing and External Clock. Used to control the switching frequency by setting the internal oscillator frequency (connect resistor from RT/CLK to GND) or by synchronizing to an external clock (100kHz to 2.2MHz) via internal PLL. If the external clock edges stop, the operating mode automatically returns to resistor frequency programming.", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -172,7 +166,7 @@ "description": "Feedback sensing terminal for the output voltage. Connect this pin to the resistive divider of the output. Internal reference is 0.8V (typ).", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -202,7 +196,7 @@ "description": "Compensation. Connect an external RC network to the COMP pin to adjust the loop response of the error amplifier.", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -232,7 +226,7 @@ "description": "Power Ground. Return path for internal circuitry and the low-side power MOSFET.", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -262,7 +256,33 @@ "description": "Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the output load.", "is_pin1": false, "source": {- "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "9",+ "kind": "smd",+ "shape": "rect",+ "at": [+ 0.0,+ 0.0+ ],+ "rot": 0.0,+ "size": [+ 2.29,+ 3.0+ ],+ "layers": [],+ "thermal": true,+ "pin": "9",+ "name": "EXPOSED PAD",+ "type": "power_in",+ "description": "Heat dissipation path of the die. The exposed thermal pad must be electrically connected to GND and must be connected to the ground plane of the PCB for proper operation and optimized thermal performance.",+ "is_pin1": false,+ "source": {+ "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }
page.json+1−1@@ -111,7 +111,7 @@ ], "corner": "top-left", "source": "silk-marker",- "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",+ "derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm@sha256:a7971720bdda0353", "mark": "drawn" } },