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ap2176sg-13: restore the component block (pinout + model declarations) from this page's own README and symbol

Ray ·050d9d6784 · ·parent 2c8dff0
1 file changed +75−1
page.json+75−1
@@ -33,5 +33,79 @@   "author": {     "name": "Ray",     "email": "[email protected]"+  },+  "component": {+    "mpn": "AP2176SG-13",+    "manufacturer": "Diodes Incorporated",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "AC-DC Controllers and Regulators",+    "datasheet": "https://www.diodes.com/assets/Datasheets/AP2176SG-13.pdf",+    "parts": {+      "symbol": "ap2176sg-13.kicad_sym",+      "footprint": "ap2176sg-13.kicad_mod",+      "model_3d": "ap2176sg-13-etched.glb",+      "model_3d_plain": "ap2176sg-13.glb",+      "model_3d_step": "ap2176sg-13-etched.step",+      "model_3d_step_plain": "ap2176sg-13.step",+      "lbr": "ap2176sg-13.lbr"+    },+    "pins": [+      {+        "number": "1",+        "name": "EN1",+        "type": "input",+        "description": "Switch 1 enable input, active high on AP2176. Logic low ≤ 0.8V, logic high ≥ 2V (up to VIN, 6.5V absolute max). Input leakage ≤ 1µA at VEN = 5V."+      },+      {+        "number": "2",+        "name": "FLG1",+        "type": "output",+        "description": "Switch 1 over-current and over-temperature fault report, open-drain. Asserts low after ~7ms deglitch (4-15ms) during fault. Requires an external pull-up (e.g. 10kΩ). RFLG ≈ 20Ω typ (40Ω max) at IFLG = 10mA."+      },+      {+        "number": "3",+        "name": "FLG2",+        "type": "output",+        "description": "Switch 2 over-current and over-temperature fault report, open-drain. Asserts low after ~7ms deglitch during fault. Requires external pull-up. RFLG ≈ 20Ω typ at IFLG = 10mA."+      },+      {+        "number": "4",+        "name": "EN2",+        "type": "input",+        "description": "Switch 2 enable input, active high on AP2176. Logic low ≤ 0.8V, logic high ≥ 2V. Input leakage ≤ 1µA at VEN = 5V."+      },+      {+        "number": "5",+        "name": "OUT2",+        "type": "power_out",+        "description": "Switch 2 voltage output pin. Delivers up to 1.0A recommended continuous load current (1.5A typ current limit) from IN through the internal PMOS switch (RDS(ON) ≈ 100mΩ typ for SO-8 at VIN=5V). Bypass with 0.1µF ceramic and 68µF electrolytic recommended."+      },+      {+        "number": "6",+        "name": "GND",+        "type": "power_in",+        "description": "Device ground reference."+      },+      {+        "number": "7",+        "name": "IN",+        "type": "power_in",+        "description": "Voltage input pin (common supply feeding both channels). Operating range 2.7V to 5.5V (6.5V absolute max). UVLO releases at ~1.9V. Recommend 0.01-0.1µF X7R/X5R ceramic close to the pin plus ≥10µF electrolytic bulk."+      },+      {+        "number": "8",+        "name": "OUT1",+        "type": "power_out",+        "description": "Switch 1 voltage output pin. Delivers up to 1.0A recommended continuous load current (1.5A typ current limit). Bypass with 0.1µF ceramic and 68µF electrolytic recommended."+      }+    ],+    "provenance": {+      "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }   }-}\ No newline at end of file+}