← Commit history

Add component metadata and pin table

Caleb ·98fa4d90af ·20d ago ·parent 75e4bcc
1 file changed +173−30
page.json+173−30
@@ -1,28 +1,35 @@ {   "schema_version": 1,-  "slug": "ao4805",   "type": "component",-  "kind": "component",+  "slug": "ao4805",   "title": "AO4805",   "brief": "Alpha & Omega Semiconductor FET, MOSFET Arrays, SOIC-8. KiCad symbol, footprint and 3D as used on Adom boards; pin functions from the manufacturer datasheet.",   "version": "0.1.0",-  "because": "No wiki page exists for this MPN: cross-referenced every BOM line of the Adom board pages against all 25,496 hardware pages on 2026-10-07; this part had no match by MPN or LCSC number.",-  "hero": {-    "type": "billboard",-    "headline": "AO4805",-    "subhead": "Alpha & Omega Semiconductor FET, MOSFET Arrays",-    "screenshot": "docs/hero.png",-    "chrome": false-  },+  "license": "NOASSERTION",+  "tags": [+    "component",+    "transistors/thyristors",+    "ao4805",+    "board-derived",+    "staged-for-validation"+  ],   "component": {     "mpn": "AO4805",     "manufacturer": "Alpha & Omega Semiconductor",     "package": "SOIC-8",-    "pin_count": null,+    "pin_count": 8,     "category": "Transistors/Thyristors",     "subcategory": "FET, MOSFET Arrays",-    "body_size": null,-    "parts": {},+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586175825766977536",+    "parts": {+      "symbol": "ao4805.kicad_sym",+      "footprint": "ao4805.kicad_mod",+      "model_3d": "ao4805-etched.glb",+      "model_3d_plain": "ao4805.glb",+      "model_3d_step": "ao4805-etched.step",+      "model_3d_step_plain": "ao4805.step",+      "lbr": "ao4805.lbr"+    },     "distributor_links": {       "digikey": {         "part": "785-1055-2-ND",@@ -35,31 +42,167 @@         "url": "https://www.lcsc.com/product-detail/C38943.html"       }     },-    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586175825766977536"+    "pins": [+      {+        "number": "1",+        "name": "S2",+        "type": "passive",+        "description": "Source of P-channel MOSFET #2. Connected to the source terminal of the second P-channel MOSFET die inside the dual package. [datasheet p.1]"+      },+      {+        "number": "2",+        "name": "G2",+        "type": "input",+        "description": "Gate of P-channel MOSFET #2. Gate threshold voltage VGS(th) = -1.7V to -2.8V (typical -2.3V). Maximum VGS = ±25V. [datasheet p.1]"+      },+      {+        "number": "3",+        "name": "S1",+        "type": "passive",+        "description": "Source of P-channel MOSFET #1. Connected to the source terminal of the first P-channel MOSFET die inside the dual package. [datasheet p.1]"+      },+      {+        "number": "4",+        "name": "G1",+        "type": "input",+        "description": "Gate of P-channel MOSFET #1. Gate threshold voltage VGS(th) = -1.7V to -2.8V (typical -2.3V). Maximum VGS = ±25V. [datasheet p.1]"+      },+      {+        "number": "5",+        "name": "D1",+        "type": "passive",+        "description": "Drain of P-channel MOSFET #1. Pins 5 and 6 are tied together internally for current handling and thermal performance. Drain-Source breakdown voltage BVDSS = -30V. [datasheet p.1]"+      },+      {+        "number": "6",+        "name": "D1",+        "type": "passive",+        "description": "Drain of P-channel MOSFET #1. Pins 5 and 6 are tied together internally for current handling and thermal performance. Drain-Source breakdown voltage BVDSS = -30V. [datasheet p.1]"+      },+      {+        "number": "7",+        "name": "D2",+        "type": "passive",+        "description": "Drain of P-channel MOSFET #2 (second drain lead). Pins 7 and 8 are tied together internally for current handling and thermal performance. [datasheet p.1]"+      },+      {+        "number": "8",+        "name": "D2",+        "type": "passive",+        "description": "Drain of P-channel MOSFET #2 (second drain lead). Pins 7 and 8 are tied together internally for current handling and thermal performance. [datasheet p.1]"+      }+    ],+    "provenance": {+      "factory_chain": {+        "pipeline": "adom-parts (board-derived) 0.1",+        "pins": "KiCad symbol from the source board + adom-ds2sf datasheet extraction (claude-opus-4-7)",+        "at": "2026-10-08"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586175825766977536",+        "pages": 5,+        "sha256": "d5ab4cd887b7c1672a7267d69cd345650440d5c5237104623195bbf4dfb5e148",+        "source_tier": "lcsc"+      },+      "cad": "Footprint, symbol and 3D model as used on Adom board designs; the 3D model was extracted from the board STEP export",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "ao4805.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin",+        "seat": "z = 0 (PCB top surface)",+        "extents_mm": [+          6.0,+          4.9,+          1.6+        ],+        "zmin_mm": -0.0,+        "footprint_binding": "identity",+        "sha256": "608993a3f33302f7912e7cfcd9a65c5aab9eeefea627187b28675d34863af87c",+        "checked": "2026-10-08",+        "checked_by": "adom-parts/partstep.py (placement inverse from the source board; centroid-matched to KiCad library models on 59 reference cases)"+      },+      {+        "file": "ao4805-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin",+        "seat": "z = 0 (PCB top surface)",+        "extents_mm": [+          6.0,+          4.9,+          1.602+        ],+        "zmin_mm": -0.0,+        "footprint_binding": "identity",+        "sha256": "2285910e292dde46ab16db5705e990c3f0e8e4319d3c23eb10cf7c3cb2572b3a",+        "checked": "2026-10-08",+        "checked_by": "adom-parts/partstep.py (placement inverse from the source board; centroid-matched to KiCad library models on 59 reference cases)"+      }+    ]   },-  "tags": [-    "component",-    "transistors/thyristors",-    "ao4805",-    "board-derived",-    "staged-for-validation"+  "metadata": {+    "specs": {+      "Manufacturer": "Alpha & Omega Semiconductor",+      "Package": "SOIC-8",+      "Category": "Transistors/Thyristors",+      "Pins": "8",+      "LCSC": "C38943"+    }+  },+  "variants": [],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"   ],   "discovery_triggers": [     "ao4805",     "ao4805"   ],-  "license": "NOASSERTION",-  "visibility": {-    "public": false-  },+  "discovery_pitch": "AO4805 (Alpha & Omega Semiconductor) component page: pinout, KiCad symbol, footprint and 3D.",   "author": {     "name": "Caleb",     "email": "[email protected]"   },-  "sample_prompts": [],-  "discovery_pitch": null,-  "metadata": {},-  "created_at": "2026-10-08T18:25:04.722Z",-  "updated_at": "2026-10-08T18:25:04.722Z",-  "org": "adom"+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "verification.json",+    "ao4805.kicad_sym",+    "ao4805.kicad_mod",+    "ao4805-etched.glb",+    "ao4805-etched.step",+    "ao4805.glb",+    "ao4805.step",+    "ao4805.lbr",+    "docs/hero.png",+    "docs/ao4805-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": {+    "public": false+  } }\ No newline at end of file