component
AIP74LVC1G02GC353.TR
Public Made by Adomby adom
Wuxi I core Elec Gates, SOT-353. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C4945061). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+26−6
aip74lvc1g02gc353-tr.lbr+20−2@@ -59,6 +59,18 @@ <smd name="3" x="-0.8375" y="-0.6500" dx="1.0250" dy="0.3500" layer="1"/> <smd name="4" x="0.8375" y="-0.6500" dx="1.0250" dy="0.3500" layer="1"/> <smd name="5" x="0.8375" y="0.6500" dx="1.0250" dy="0.3500" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-1.1800" y="1.0900"/>+ <vertex x="-1.3200" y="1.2800"/>+ <vertex x="-1.0400" y="1.2800"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.3125" y="1.0000"/>+ <vertex x="0.6250" y="1.0000"/>+ <vertex x="0.6250" y="-1.0000"/>+ <vertex x="-0.6250" y="-1.0000"/>+ <vertex x="-0.6250" y="0.6875"/>+ </polygon> <wire x1="-0.7350" y1="1.1100" x2="0.7350" y2="1.1100" width="0.1200" layer="21"/> <wire x1="-0.7350" y1="1.0850" x2="-0.7350" y2="1.1100" width="0.1200" layer="21"/> <wire x1="-0.7350" y1="-1.1100" x2="-0.7350" y2="-1.0850" width="0.1200" layer="21"/>@@ -68,7 +80,7 @@ <wire x1="0.7350" y1="-1.1100" x2="-0.7350" y2="-1.1100" width="0.1200" layer="21"/> <text x="0" y="1.763" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-1.763" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-1.1800" y="1.0900"/><vertex x="-1.3200" y="1.2800"/><vertex x="-1.0400" y="1.2800"/></polygon></package>+</package> </packages> <symbols> <symbol name="AIP74LVC1G02GC353.TR">@@ -100,7 +112,13 @@ <connect gate="G$1" pin="VCC" pad="5"/> <connect gate="G$1" pin="Y" pad="4"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="AIP74LVC1G02GC353.TR" constant="no"/>+ <attribute name="MANUFACTURER" value="Wuxi I core Elec AIP74LVC1G02GC353 TR" constant="no"/>+ <attribute name="LCSC_PN" value="C4945061" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+6−4@@ -26,19 +26,21 @@ "model_3d_step": "aip74lvc1g02gc353-tr.step", "lbr": "aip74lvc1g02gc353-tr.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C4945061"+ }, "pins": [ { "number": "1", "name": "B", "type": "input",- "description": "Logic data input B of the 2-input NOR gate. CMOS/TTL compatible; 5V-tolerant regardless of Vcc (input voltage may reach 5.5V). VIH ≥ 0.7×Vcc at Vcc=4.5-5.5V."+ "description": "Logic data input B of the 2-input NOR gate. CMOS/TTL compatible; 5V-tolerant regardless of Vcc (input voltage may reach 5.5V). VIH \u2265 0.7\u00d7Vcc at Vcc=4.5-5.5V." }, { "number": "2", "name": "A", "type": "input",- "description": "Logic data input A of the 2-input NOR gate. CMOS/TTL compatible; 5V-tolerant regardless of Vcc. VIH ≥ 0.7×Vcc at Vcc=4.5-5.5V."+ "description": "Logic data input A of the 2-input NOR gate. CMOS/TTL compatible; 5V-tolerant regardless of Vcc. VIH \u2265 0.7\u00d7Vcc at Vcc=4.5-5.5V." }, { "number": "3",@@ -50,7 +52,7 @@ "number": "4", "name": "Y", "type": "output",- "description": "NOR gate data output. Y = NOT(A OR B). Drives ±24mA at Vcc=3.0V; VOH ≥ Vcc-0.1V at IO=100µA."+ "description": "NOR gate data output. Y = NOT(A OR B). Drives \u00b124mA at Vcc=3.0V; VOH \u2265 Vcc-0.1V at IO=100\u00b5A." }, { "number": "5",