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Initial commit: component/aip74hc245ta20-tr

Ray ·b03f78115c ·2mo ago
2 files changed +98
README.mdadded+64
@@ -0,0 +1,64 @@+# AiP74HC245TA20.TR++**Wuxi I core Elec AiP74HC245TA20 TR** · Latches · TSSOP-20++AiP74HC245TA20.TR from Wuxi I core Elec AiP74HC245TA20 TR, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DIR | input | Transmission direction control. When DIR=L, data flows from B to A (B is input, A is output). When DIR=H, data flows from A to B (A is input, B is output). CMOS-level input (TTL-level on HCT variant). |+| 2 | A0 | bidirectional | Port A data I/O, bit 0. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. High-impedance when OE=H. |+| 3 | A1 | bidirectional | Port A data I/O, bit 1. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 4 | A2 | bidirectional | Port A data I/O, bit 2. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 5 | A3 | bidirectional | Port A data I/O, bit 3. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 6 | A4 | bidirectional | Port A data I/O, bit 4. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 7 | A5 | bidirectional | Port A data I/O, bit 5. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 8 | A6 | bidirectional | Port A data I/O, bit 6. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 9 | A7 | bidirectional | Port A data I/O, bit 7. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 10 | GND | power_in | Ground (0V) reference for the device. |+| 11 | B7 | bidirectional | Port B data I/O, bit 7. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 12 | B6 | bidirectional | Port B data I/O, bit 6. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 13 | B5 | bidirectional | Port B data I/O, bit 5. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 14 | B4 | bidirectional | Port B data I/O, bit 4. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 15 | B3 | bidirectional | Port B data I/O, bit 3. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 16 | B2 | bidirectional | Port B data I/O, bit 2. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 17 | B1 | bidirectional | Port B data I/O, bit 1. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 18 | B0 | bidirectional | Port B data I/O, bit 0. Bidirectional bus-transceiver pin; direction set by DIR, enabled when OE is low. |+| 19 | ~{OE} | input | Output Enable, active low. When OE=L the transceiver is enabled and drives one port from the other (per DIR). When OE=H both A and B outputs are placed in high-impedance state. |+| 20 | VCC | power_in | Supply voltage. HC variant: 2.0 V to 6.0 V (typ 5.0 V). HCT variant: 4.5 V to 5.5 V (typ 5.0 V). Absolute maximum 7.0 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Wuxi I core Elec AiP74HC245TA20 TR |+| Package | TSSOP-20 |+| Category | Logic |+| Pins | 20 |++## Ordering variants++- `AiP74HC245TA20.TR`+- `AiP74HC245TA20.TRTA20.TB`+- `AiP74HC245TA20.TRSA20.TR`+- `AiP74HC245TA20.TRSA20.TB`+- `AiP74HC245TA20.TRDA20.TB`++## CAD (KiCad official)++- Symbol: `AiP74HC245TA20.TR`+- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`+- 3D model: TSSOP-20 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Wuxi I core Elec AiP74HC245TA20 TR datasheet](docs/aip74hc245ta20-tr-datasheet.pdf) (None pp, sha256 `6695932f711a2bdf`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/aip74hc245ta20-tr-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "aip74hc245ta20-tr",+  "version": "0.1.0",+  "type": "component",+  "description": "Wuxi I core Elec AiP74HC245TA20 TR Latches, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "aip74hc245ta20.tr"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "aip74hc245ta20-tr.kicad_sym",+    "aip74hc245ta20-tr.kicad_mod",+    "aip74hc245ta20-tr.glb",+    "aip74hc245ta20-tr.step",+    "aip74hc245ta20-tr.lbr",+    "docs/hero.png",+    "docs/aip74hc245ta20-tr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file