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Initial commit: component/aip74hc14sa14-tr

Ray ·d35c395ea9 ·2mo ago
2 files changed +92
README.mdadded+58
@@ -0,0 +1,58 @@+# AiP74HC14SA14.TR++**Wuxi I core Elec AiP74HC14SA14 TR** · Inverters · SOP-14++AiP74HC14SA14.TR from Wuxi I core Elec AiP74HC14SA14 TR, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Schmitt-trigger data input to inverter 1. CMOS-level input; VT+ typical 2.38 V at VCC=4.5 V, VT- typical 1.4 V, hysteresis (VH) typical 0.98 V. Input voltage range 0 to VCC. |+| 2 | 1Y | output | Inverted data output of inverter 1. Push-pull CMOS output; VOH >= 3.98 V at IOH=-4.0 mA, VCC=4.5 V; VOL <= 0.26 V at IOL=4.0 mA, VCC=4.5 V. |+| 3 | 2A | input | Schmitt-trigger data input to inverter 2. CMOS-level input with hysteresis (VH typical 0.98 V at VCC=4.5 V). Input voltage range 0 to VCC. |+| 4 | 2Y | output | Inverted data output of inverter 2. Push-pull CMOS output; rated +/-4.0 mA drive at VCC=4.5 V, +/-5.2 mA at VCC=6.0 V. |+| 5 | 3A | input | Schmitt-trigger data input to inverter 3. CMOS-level input with hysteresis. Input voltage range 0 to VCC; input leakage +/-0.1 uA max at 25 degrees C. |+| 6 | 3Y | output | Inverted data output of inverter 3. Push-pull CMOS output driving the inverse logic level of 3A. |+| 7 | GND | power_in | Ground reference (0 V). Return path for supply current and all input/output signals. |+| 8 | 4Y | output | Inverted data output of inverter 4. Push-pull CMOS output driving the inverse logic level of 4A. |+| 9 | 4A | input | Schmitt-trigger data input to inverter 4. CMOS-level input with hysteresis. Input voltage range 0 to VCC. |+| 10 | 5Y | output | Inverted data output of inverter 5. Push-pull CMOS output driving the inverse logic level of 5A. |+| 11 | 5A | input | Schmitt-trigger data input to inverter 5. CMOS-level input with hysteresis. Input voltage range 0 to VCC. |+| 12 | 6Y | output | Inverted data output of inverter 6. Push-pull CMOS output driving the inverse logic level of 6A. |+| 13 | 6A | input | Schmitt-trigger data input to inverter 6. CMOS-level input with hysteresis. Input voltage range 0 to VCC. |+| 14 | VCC | power_in | Positive supply voltage. Recommended operating range 2.0 V to 6.0 V (typ 5.0 V); absolute max +7 V. Quiescent ICC <= 2 uA at 25 degrees C, VCC=6.0 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Wuxi I core Elec AiP74HC14SA14 TR |+| Package | SOP-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++- `AiP74HC14SA14.TR`+- `AiP74HC14SA14.TRSA14.TB`+- `AiP74HC14SA14.TRDA14.TB`+- `AiP74HC14SA14.TRTA14.TR`+- `AiP74HC14SA14.TRTA14.TB`++## CAD (KiCad official)++- Symbol: `AiP74HC14SA14.TR`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Wuxi I core Elec AiP74HC14SA14 TR datasheet](docs/aip74hc14sa14-tr-datasheet.pdf) (None pp, sha256 `459fa1dbe537685a`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/aip74hc14sa14-tr-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "aip74hc14sa14-tr",+  "version": "0.1.0",+  "type": "component",+  "description": "Wuxi I core Elec AiP74HC14SA14 TR Inverters, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "aip74hc14sa14.tr"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "aip74hc14sa14-tr.kicad_sym",+    "aip74hc14sa14-tr.kicad_mod",+    "aip74hc14sa14-tr.glb",+    "aip74hc14sa14-tr.step",+    "aip74hc14sa14-tr.lbr",+    "docs/hero.png",+    "docs/aip74hc14sa14-tr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file