component
AIP24C02ASA8.TR
Public Made by Adomby adom
Wuxi I core Elec Shifting Register, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+116−8@@ -1,13 +1,126 @@ {+ "schema_version": 1,+ "type": "component", "slug": "aip24c02asa8-tr",+ "title": "AIP24C02ASA8.TR",+ "brief": "Wuxi I core Elec AIP24C02ASA8 TR Shifting Register, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Wuxi I core Elec AIP24C02ASA8 TR Shifting Register, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "aip24c02asa8.tr" ],+ "component": {+ "mpn": "AIP24C02ASA8.TR",+ "manufacturer": "Wuxi I core Elec AIP24C02ASA8 TR",+ "package": "SOP-8",+ "pin_count": 8,+ "category": "Logic",+ "subcategory": "Shifting Register",+ "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2205241716_Wuxi-I-core-Elec-AIP24C02ASA8-TR_C3024252.pdf",+ "parts": {+ "symbol": "aip24c02asa8-tr.kicad_sym",+ "footprint": "aip24c02asa8-tr.kicad_mod",+ "model_3d": "aip24c02asa8-tr.glb",+ "model_3d_step": "aip24c02asa8-tr.step",+ "lbr": "aip24c02asa8-tr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "A0",+ "type": "input",+ "description": "Device address input bit 0. A2/A1/A0 form the programmable slave address bits, allowing up to 8 devices (2K each) on a single I2C bus."+ },+ {+ "number": "2",+ "name": "A1",+ "type": "input",+ "description": "Device address input bit 1. Tie to VCC or GND to set the chip's I2C slave address."+ },+ {+ "number": "3",+ "name": "A2",+ "type": "input",+ "description": "Device address input bit 2. Tie to VCC or GND to set the chip's I2C slave address."+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "5",+ "name": "SDA",+ "type": "bidirectional",+ "description": "I2C serial data. Bidirectional open-drain line; requires an external pull-up resistor to VCC. Can be wire-OR'd with other open-drain/open-collector devices."+ },+ {+ "number": "6",+ "name": "SCL",+ "type": "input",+ "description": "I2C serial clock input. Data is latched into the EEPROM on the rising edge and clocked out on the falling edge. Up to 400 kHz at 1.8-2.5 V and 1 MHz at 2.5-5.5 V."+ },+ {+ "number": "7",+ "name": "WP",+ "type": "input",+ "description": "Write protect. Tie to GND to allow normal read/write of the entire array; tie to VCC to hardware write-protect all 2K of memory."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage, 1.8 V to 5.5 V. Absolute max 6.25 V."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2205241716_Wuxi-I-core-Elec-AIP24C02ASA8-TR_C3024252.pdf",+ "pages": 16,+ "sha256": "c9d6142c9bf9cff7",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Wuxi I core Elec AIP24C02ASA8 TR",+ "Package": "SOP-8",+ "Category": "Logic",+ "Pins": "8"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "aip24c02asa8.tr"+ ],+ "discovery_pitch": "AIP24C02ASA8.TR (Wuxi I core Elec AIP24C02ASA8 TR) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +138,5 @@ "docs/aip24c02asa8-tr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }