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ADS8686SIPZAR
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Texas Instruments Analog To Digital Converters (ADC), LQFP-80(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+117@@ -0,0 +1,117 @@+# ADS8686SIPZAR++**Texas Instruments** · Analog To Digital Converters (ADC) · LQFP-80(14x14)++ADS8686SIPZAR from Texas Instruments, in a LQFP-80(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | AIN_4BGND | input | Analog input channel 4B negative input; 0.3V differential range to AIN_4B |+| 2 | AIN_4B | input | Analog input channel 4B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 3 | AIN_5BGND | input | Analog input channel 5B negative input; 0.3V differential range to AIN_5B |+| 4 | AIN_5B | input | Analog input channel 5B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 5 | AGND | power_in | Analog ground pin; connect all AGND pins to analog ground plane |+| 6 | AVDD | power_in | Analog power pin 4.75V to 5.25V; connect to nearest AGND with 10µF and 0.1µF decoupling capacitors |+| 7 | AIN_6B | input | Analog input channel 6B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 8 | AIN_6BGND | input | Analog input channel 6B negative input; 0.3V differential range to AIN_6B |+| 9 | AIN_7B | input | Analog input channel 7B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 10 | AIN_7BGND | input | Analog input channel 7B negative input; 0.3V differential range to AIN_7B |+| 11 | AIN_7AGND | input | Analog input channel 7A negative input; 0.3V differential range to AIN_7A |+| 12 | AIN_7A | input | Analog input channel 7A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 13 | AIN_6AGND | input | Analog input channel 6A negative input; 0.3V differential range to AIN_6A |+| 14 | AIN_6A | input | Analog input channel 6A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 15 | AVDD | power_in | Analog power pin 4.75V to 5.25V; connect to nearest AGND with 10µF and 0.1µF decoupling capacitors |+| 16 | AGND | power_in | Analog ground pin; connect all AGND pins to analog ground plane |+| 17 | AIN_5A | input | Analog input channel 5A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 18 | AIN_5AGND | input | Analog input channel 5A negative input; 0.3V differential range to AIN_5A |+| 19 | AIN_4A | input | Analog input channel 4A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 20 | AIN_4AGND | input | Analog input channel 4A negative input; 0.3V differential range to AIN_4A |+| 21 | AIN_3AGND | input | Analog input channel 3A negative input; 0.3V differential range to AIN_3A |+| 22 | AIN_3A | input | Analog input channel 3A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 23 | AIN_2AGND | input | Analog input channel 2A negative input; 0.3V differential range to AIN_2A |+| 24 | AIN_2A | input | Analog input channel 2A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 25 | AIN_1AGND | input | Analog input channel 1A negative input; 0.3V differential range to AIN_1A |+| 26 | AIN_1A | input | Analog input channel 1A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 27 | AIN_0AGND | input | Analog input channel 0A negative input; 0.3V differential range to AIN_0A |+| 28 | AIN_0A | input | Analog input channel 0A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 29 | AGND | power_in | Analog ground pin; connect all AGND pins to analog ground plane |+| 30 | AVDD | power_in | Analog power pin 4.75V to 5.25V; connect to nearest AGND with 10µF and 0.1µF decoupling capacitors |+| 31 | REFCAP | power_out | Reference amplifier output pin; decoupled with 10µF low ESR ceramic capacitor to REFGND near the pin |+| 32 | REFGND | power_in | Reference ground pin; connect to AGND plane with shortest trace |+| 33 | REFIO | bidirectional | Internal 2.5V reference output when REFSEL high; external reference input when REFSEL low; decoupled with 0.1µF to REFIO_GND |+| 34 | REFIO_GND | power_in | REFIO ground pin; connect to AGND plane with shortest trace |+| 35 | REFSEL | input | Active high logic input to enable internal reference; state latched at RESET release |+| 36 | RESET | input | Active low logic input for device digital logic reset; pulse duration determines partial or full reset |+| 37 | SEQEN | input | Active high logic input to enable channel sequencer in hardware mode; state latched at RESET release |+| 38 | HW_RNGSEL1 | input | Hardware and software mode selection input; state latched at full reset for analog input range selection |+| 39 | HW_RNGSEL0 | input | Hardware and software mode selection input; state latched at full reset for analog input range selection |+| 40 | SER/BYTE/PAR | input | Logic input for interface mode selection between serial, parallel byte, or parallel modes; state latched at full reset |+| 41 | DB0 | tri_state | Data bus bit 0 (LSB) in parallel/byte modes; must connect to DGND in serial mode |+| 42 | DB1 | tri_state | Data bus bit 1 in parallel/byte modes; must connect to DGND in serial mode |+| 43 | DB2 | tri_state | Data bus bit 2 in parallel/byte modes; must connect to DGND in serial mode |+| 44 | DB3 | tri_state | Data bus bit 3 in parallel/byte modes; must connect to DGND in serial mode |+| 45 | DB4/SER1W | tri_state | Multifunctional pin: DB4 data in parallel/byte modes or serial 1-wire/2-wire mode selection; state latched at full reset |+| 46 | DB5/CRCEN | tri_state | Multifunctional pin: DB5 data in parallel/byte modes or CRC enable in serial mode; state latched at full reset |+| 47 | DB6 | tri_state | Data bus bit 6 in parallel/byte modes; must connect to DGND in serial mode |+| 48 | DB7 | tri_state | Data bus bit 7 in parallel/byte modes; must connect to DGND in serial mode |+| 49 | DVDD | power_in | Digital power pin 1.71V to AVDD; decoupled with minimum 0.1µF capacitor to DGND at pin 50 |+| 50 | DGND | power_in | Digital ground pin; connect to digital ground plane |+| 51 | REGGNDD | power_in | Internal digital regulator ground pin; connect to DGND plane with shortest trace |+| 52 | REGCAPD | power_out | Internal digital regulator voltage output; decoupled with 10µF ceramic capacitor to REGGNDD near the pin |+| 53 | DB8 | tri_state | Multifunctional pin: DB8 data in parallel mode; must connect to DGND in byte/serial modes |+| 54 | DB9/BYTESEL | tri_state | Multifunctional pin: DB9 data in parallel modes or parallel byte interface enable; state latched at full reset |+| 55 | DB10/SDI | tri_state | Multifunctional pin: DB10 data in parallel modes or serial data input in software serial mode |+| 56 | DB11/SDOB | tri_state | Multifunctional pin: DB11 data in parallel modes or serial data output B when enabled; must connect to DGND in byte mode |+| 57 | DB12/SDOA | tri_state | Multifunctional pin: DB12 data in parallel modes or serial data output A in serial mode |+| 58 | DB13/OS0 | tri_state | Multifunctional pin: DB13 data in parallel modes or oversampling rate bit 0 in hardware serial mode |+| 59 | DB14/OS1 | tri_state | Multifunctional pin: DB14 data in parallel modes or oversampling rate bit 1 in hardware serial mode |+| 60 | DB15/OS2 | tri_state | Multifunctional pin: DB15 data (MSB) in parallel modes or oversampling rate bit 2 in hardware serial mode |+| 61 | WR/BURST | input | Multifunctional logic input: write control in software parallel/byte modes or burst mode enable in hardware mode |+| 62 | SCLK/RD | input | Multifunctional logic input: serial clock in serial mode or read control in parallel/byte modes; enables output bus when low with CS |+| 63 | CS | input | Active low chip select logic input; controls three-state output drivers on data lines |+| 64 | CHSEL0 | input | Logic input for channel selection or hardware sequencer programming; read during CONVST or reset |+| 65 | CHSEL1 | input | Logic input for channel selection or hardware sequencer programming; read during CONVST or reset |+| 66 | CHSEL2 | input | Logic input for channel selection or hardware sequencer programming; read during CONVST or reset |+| 67 | BUSY | output | Logic output indicating ongoing analog-to-digital conversion; high during conversion, low when complete |+| 68 | CONVST | input | Logic input to initiate conversion of selected channels when BUSY is low; rising edge triggers start of conversion |+| 69 | REGGND | power_in | Internal analog regulator ground pin; connect to AGND plane with shortest trace |+| 70 | REGCAP | power_out | Internal analog regulator voltage output; decoupled with 10µF ceramic capacitor to REGGND near the pin |+| 71 | AVDD | power_in | Analog power pin 4.75V to 5.25V; connect to nearest AGND with 10µF and 0.1µF decoupling capacitors |+| 72 | AGND | power_in | Analog ground pin; connect all AGND pins to analog ground plane |+| 73 | AIN_0B | input | Analog input channel 0B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 74 | AIN_0BGND | input | Analog input channel 0B negative input; 0.3V differential range to AIN_0B |+| 75 | AIN_1B | input | Analog input channel 1B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 76 | AIN_1BGND | input | Analog input channel 1B negative input; 0.3V differential range to AIN_1B |+| 77 | AIN_2B | input | Analog input channel 2B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 78 | AIN_2BGND | input | Analog input channel 2B negative input; 0.3V differential range to AIN_2B |+| 79 | AIN_3B | input | Analog input channel 3B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals |+| 80 | AIN_3BGND | input | Analog input channel 3B negative input; 0.3V differential range to AIN_3B |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | LQFP-80(14x14) |+| Category | Data Acquisition |+| Pins | 80 |++## CAD (KiCad official)++- Symbol: `ADS8686SIPZAR`+- Footprint: `Package_QFP:LQFP-80_14x14mm_P0.65mm`+- 3D model: LQFP-80(14x14) (KiCad packages3D, STEP)+- 3D model files: `ads8686sipzar-etched.step` / `ads8686sipzar-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads8686sipzar.step` / `ads8686sipzar.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads8686s) (117 pp, sha256 `ed56e671a196fe1f`, retrieved 2026-09-23, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ads8686sipzar-datasheet.pdf)
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0.3V differential range to AIN_4B"+ },+ {+ "number": "2",+ "name": "AIN_4B",+ "type": "input",+ "description": "Analog input channel 4B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "3",+ "name": "AIN_5BGND",+ "type": "input",+ "description": "Analog input channel 5B negative input; 0.3V differential range to AIN_5B"+ },+ {+ "number": "4",+ "name": "AIN_5B",+ "type": "input",+ "description": "Analog input channel 5B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "5",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin; connect all AGND pins to analog ground plane"+ },+ {+ "number": "6",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power pin 4.75V to 5.25V; connect to nearest AGND with 10µF and 0.1µF decoupling capacitors"+ },+ {+ "number": "7",+ "name": "AIN_6B",+ "type": "input",+ "description": "Analog input channel 6B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "8",+ "name": "AIN_6BGND",+ "type": "input",+ "description": "Analog input channel 6B negative input; 0.3V differential range to AIN_6B"+ },+ {+ "number": "9",+ "name": "AIN_7B",+ "type": "input",+ "description": "Analog input channel 7B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "10",+ "name": "AIN_7BGND",+ "type": "input",+ "description": "Analog input channel 7B negative input; 0.3V differential range to AIN_7B"+ },+ {+ "number": "11",+ "name": "AIN_7AGND",+ "type": "input",+ "description": "Analog input channel 7A negative input; 0.3V differential range to AIN_7A"+ },+ {+ "number": "12",+ "name": "AIN_7A",+ "type": "input",+ "description": "Analog input channel 7A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "13",+ "name": "AIN_6AGND",+ "type": "input",+ "description": "Analog input channel 6A negative input; 0.3V differential range to AIN_6A"+ },+ {+ "number": "14",+ "name": "AIN_6A",+ "type": "input",+ "description": "Analog input channel 6A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "15",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power pin 4.75V to 5.25V; connect to nearest AGND with 10µF and 0.1µF decoupling capacitors"+ },+ {+ "number": "16",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin; connect all AGND pins to analog ground plane"+ },+ {+ "number": "17",+ "name": "AIN_5A",+ "type": "input",+ "description": "Analog input channel 5A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "18",+ "name": "AIN_5AGND",+ "type": "input",+ "description": "Analog input channel 5A negative input; 0.3V differential range to AIN_5A"+ },+ {+ "number": "19",+ "name": "AIN_4A",+ "type": "input",+ "description": "Analog input channel 4A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "20",+ "name": "AIN_4AGND",+ "type": "input",+ "description": "Analog input channel 4A negative input; 0.3V differential range to AIN_4A"+ },+ {+ "number": "21",+ "name": "AIN_3AGND",+ "type": "input",+ "description": "Analog input channel 3A negative input; 0.3V differential range to AIN_3A"+ },+ {+ "number": "22",+ "name": "AIN_3A",+ "type": "input",+ "description": "Analog input channel 3A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "23",+ "name": "AIN_2AGND",+ "type": "input",+ "description": "Analog input channel 2A negative input; 0.3V differential range to AIN_2A"+ },+ {+ "number": "24",+ "name": "AIN_2A",+ "type": "input",+ "description": "Analog input channel 2A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "25",+ "name": "AIN_1AGND",+ "type": "input",+ "description": "Analog input channel 1A negative input; 0.3V differential range to AIN_1A"+ },+ {+ "number": "26",+ "name": "AIN_1A",+ "type": "input",+ "description": "Analog input channel 1A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "27",+ "name": "AIN_0AGND",+ "type": "input",+ "description": "Analog input channel 0A negative input; 0.3V differential range to AIN_0A"+ },+ {+ "number": "28",+ "name": "AIN_0A",+ "type": "input",+ "description": "Analog input channel 0A positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "29",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin; connect all AGND pins to analog ground plane"+ },+ {+ "number": "30",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power pin 4.75V to 5.25V; connect to nearest AGND with 10µF and 0.1µF decoupling capacitors"+ },+ {+ "number": "31",+ "name": "REFCAP",+ "type": "power_out",+ "description": "Reference amplifier output pin; decoupled with 10µF low ESR ceramic capacitor to REFGND near the pin"+ },+ {+ "number": "32",+ "name": "REFGND",+ "type": "power_in",+ "description": "Reference ground pin; connect to AGND plane with shortest trace"+ },+ {+ "number": "33",+ "name": "REFIO",+ "type": "bidirectional",+ "description": "Internal 2.5V reference output when REFSEL high; external reference input when REFSEL low; decoupled with 0.1µF to REFIO_GND"+ },+ {+ "number": "34",+ "name": "REFIO_GND",+ "type": "power_in",+ "description": "REFIO ground pin; connect to AGND plane with shortest trace"+ },+ {+ "number": "35",+ "name": "REFSEL",+ "type": "input",+ "description": "Active high logic input to enable internal reference; state latched at RESET release"+ },+ {+ "number": "36",+ "name": "RESET",+ "type": "input",+ "description": "Active low logic input for device digital logic reset; pulse duration determines partial or full reset"+ },+ {+ "number": "37",+ "name": "SEQEN",+ "type": "input",+ "description": "Active high logic input to enable channel sequencer in hardware mode; state latched at RESET release"+ },+ {+ "number": "38",+ "name": "HW_RNGSEL1",+ "type": "input",+ "description": "Hardware and software mode selection input; state latched at full reset for analog input range selection"+ },+ {+ "number": "39",+ "name": "HW_RNGSEL0",+ "type": "input",+ "description": "Hardware and software mode selection input; state latched at full reset for analog input range selection"+ },+ {+ "number": "40",+ "name": "SER/BYTE/PAR",+ "type": "input",+ "description": "Logic input for interface mode selection between serial, parallel byte, or parallel modes; state latched at full reset"+ },+ {+ "number": "41",+ "name": "DB0",+ "type": "tri_state",+ "description": "Data bus bit 0 (LSB) in parallel/byte modes; must connect to DGND in serial mode"+ },+ {+ "number": "42",+ "name": "DB1",+ "type": "tri_state",+ "description": "Data bus bit 1 in parallel/byte modes; must connect to DGND in serial mode"+ },+ {+ "number": "43",+ "name": "DB2",+ "type": "tri_state",+ "description": "Data bus bit 2 in parallel/byte modes; must connect to DGND in serial mode"+ },+ {+ "number": "44",+ "name": "DB3",+ "type": "tri_state",+ "description": "Data bus bit 3 in parallel/byte modes; must connect to DGND in serial mode"+ },+ {+ "number": "45",+ "name": "DB4/SER1W",+ "type": "tri_state",+ "description": "Multifunctional pin: DB4 data in parallel/byte modes or serial 1-wire/2-wire mode selection; state latched at full reset"+ },+ {+ "number": "46",+ "name": "DB5/CRCEN",+ "type": "tri_state",+ "description": "Multifunctional pin: DB5 data in parallel/byte modes or CRC enable in serial mode; state latched at full reset"+ },+ {+ "number": "47",+ "name": "DB6",+ "type": "tri_state",+ "description": "Data bus bit 6 in parallel/byte modes; must connect to DGND in serial mode"+ },+ {+ "number": "48",+ "name": "DB7",+ "type": "tri_state",+ "description": "Data bus bit 7 in parallel/byte modes; must connect to DGND in serial mode"+ },+ {+ "number": "49",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital power pin 1.71V to AVDD; decoupled with minimum 0.1µF capacitor to DGND at pin 50"+ },+ {+ "number": "50",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground pin; connect to digital ground plane"+ },+ {+ "number": "51",+ "name": "REGGNDD",+ "type": "power_in",+ "description": "Internal digital regulator ground pin; connect to DGND plane with shortest trace"+ },+ {+ "number": "52",+ "name": "REGCAPD",+ "type": "power_out",+ "description": "Internal digital regulator voltage output; decoupled with 10µF ceramic capacitor to REGGNDD near the pin"+ },+ {+ "number": "53",+ "name": "DB8",+ "type": "tri_state",+ "description": "Multifunctional pin: DB8 data in parallel mode; must connect to DGND in byte/serial modes"+ },+ {+ "number": "54",+ "name": "DB9/BYTESEL",+ "type": "tri_state",+ "description": "Multifunctional pin: DB9 data in parallel modes or parallel byte interface enable; state latched at full reset"+ },+ {+ "number": "55",+ "name": "DB10/SDI",+ "type": "tri_state",+ "description": "Multifunctional pin: DB10 data in parallel modes or serial data input in software serial mode"+ },+ {+ "number": "56",+ "name": "DB11/SDOB",+ "type": "tri_state",+ "description": "Multifunctional pin: DB11 data in parallel modes or serial data output B when enabled; must connect to DGND in byte mode"+ },+ {+ "number": "57",+ "name": "DB12/SDOA",+ "type": "tri_state",+ "description": "Multifunctional pin: DB12 data in parallel modes or serial data output A in serial mode"+ },+ {+ "number": "58",+ "name": "DB13/OS0",+ "type": "tri_state",+ "description": "Multifunctional pin: DB13 data in parallel modes or oversampling rate bit 0 in hardware serial mode"+ },+ {+ "number": "59",+ "name": "DB14/OS1",+ "type": "tri_state",+ "description": "Multifunctional pin: DB14 data in parallel modes or oversampling rate bit 1 in hardware serial mode"+ },+ {+ "number": "60",+ "name": "DB15/OS2",+ "type": "tri_state",+ "description": "Multifunctional pin: DB15 data (MSB) in parallel modes or oversampling rate bit 2 in hardware serial mode"+ },+ {+ "number": "61",+ "name": "WR/BURST",+ "type": "input",+ "description": "Multifunctional logic input: write control in software parallel/byte modes or burst mode enable in hardware mode"+ },+ {+ "number": "62",+ "name": "SCLK/RD",+ "type": "input",+ "description": "Multifunctional logic input: serial clock in serial mode or read control in parallel/byte modes; enables output bus when low with CS"+ },+ {+ "number": "63",+ "name": "CS",+ "type": "input",+ "description": "Active low chip select logic input; controls three-state output drivers on data lines"+ },+ {+ "number": "64",+ "name": "CHSEL0",+ "type": "input",+ "description": "Logic input for channel selection or hardware sequencer programming; read during CONVST or reset"+ },+ {+ "number": "65",+ "name": "CHSEL1",+ "type": "input",+ "description": "Logic input for channel selection or hardware sequencer programming; read during CONVST or reset"+ },+ {+ "number": "66",+ "name": "CHSEL2",+ "type": "input",+ "description": "Logic input for channel selection or hardware sequencer programming; read during CONVST or reset"+ },+ {+ "number": "67",+ "name": "BUSY",+ "type": "output",+ "description": "Logic output indicating ongoing analog-to-digital conversion; high during conversion, low when complete"+ },+ {+ "number": "68",+ "name": "CONVST",+ "type": "input",+ "description": "Logic input to initiate conversion of selected channels when BUSY is low; rising edge triggers start of conversion"+ },+ {+ "number": "69",+ "name": "REGGND",+ "type": "power_in",+ "description": "Internal analog regulator ground pin; connect to AGND plane with shortest trace"+ },+ {+ "number": "70",+ "name": "REGCAP",+ "type": "power_out",+ "description": "Internal analog regulator voltage output; decoupled with 10µF ceramic capacitor to REGGND near the pin"+ },+ {+ "number": "71",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power pin 4.75V to 5.25V; connect to nearest AGND with 10µF and 0.1µF decoupling capacitors"+ },+ {+ "number": "72",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin; connect all AGND pins to analog ground plane"+ },+ {+ "number": "73",+ "name": "AIN_0B",+ "type": "input",+ "description": "Analog input channel 0B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "74",+ "name": "AIN_0BGND",+ "type": "input",+ "description": "Analog input channel 0B negative input; 0.3V differential range to AIN_0B"+ },+ {+ "number": "75",+ "name": "AIN_1B",+ "type": "input",+ "description": "Analog input channel 1B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "76",+ "name": "AIN_1BGND",+ "type": "input",+ "description": "Analog input channel 1B negative input; 0.3V differential range to AIN_1B"+ },+ {+ "number": "77",+ "name": "AIN_2B",+ "type": "input",+ "description": "Analog input channel 2B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "78",+ "name": "AIN_2BGND",+ "type": "input",+ "description": "Analog input channel 2B negative input; 0.3V differential range to AIN_2B"+ },+ {+ "number": "79",+ "name": "AIN_3B",+ "type": "input",+ "description": "Analog input channel 3B positive input; accepts ±10V, ±5V, or ±2.5V bipolar signals"+ },+ {+ "number": "80",+ "name": "AIN_3BGND",+ "type": "input",+ "description": "Analog input channel 3B negative input; 0.3V differential range to AIN_3B"+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: DB pins (DB0-DB15) and special function pins (DB4/SER1W, DB5/CRCEN, DB9/BYTESEL, DB10/SDI, DB11/SDOB; SCLK/RD pin (62) functions as serial clock input in serial mode or parallel read control in parallel; WR/BURST pin (61) has dual function: write control in software parallel/byte modes or burst mode ena"+ ],+ "pages_sent": 117,+ "cost_usd": 1.3871,+ "at": "2026-09-23T19:42:19"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ads8686s",+ "pages": 117,+ "sha256": "ed56e671a196fe1f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 80,+ "described": 80,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}