← Commit history

Initial commit: component/ads8588sipmr

Ray ·736076bcd7 ·9d ago
2 files changed +592
README.mdadded+101
@@ -0,0 +1,101 @@+# ADS8588SIPMR++**Texas Instruments** · Analog To Digital Converters (ADC) · LQFP-64(10x10)++ADS8588SIPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | AVDD | power_in | Analog supply pin (4.75 V to 5.25 V); decouple to AGND with 1-µF capacitor. |+| 2 | AGND | power_in | Analog ground pin; connect to common ground plane. |+| 3 | OS0 | input | Oversampling mode control pin (LSB of OS[2:0]). |+| 4 | OS1 | input | Oversampling mode control pin (middle bit of OS[2:0]). |+| 5 | OS2 | input | Oversampling mode control pin (MSB of OS[2:0]). |+| 6 | PAR/SER/BYTE SEL | input | Logic input to select parallel (low), serial (high with DB15/BYTE SEL=low), or parallel byte (high with DB15/BYTE SEL=high) interface mode. |+| 7 | STBY | input | Active low logic input to enter standby or shutdown power-down mode depending on RANGE pin. |+| 8 | RANGE | input | Multi-function: when STBY=high selects ±10 V (high) or ±5 V (low) input range; when STBY=low selects standby (high) or shutdown (low) mode. |+| 9 | CONVSTA | input | Active high logic input to initiate simultaneous sampling of first half channels (1-4). |+| 10 | CONVSTB | input | Active high logic input to initiate simultaneous sampling of second half channels (5-8). |+| 11 | RESET | input | Active high logic input to reset device digital logic; minimum pulse width 50 ns. |+| 12 | RD/SCLK | input | Active low read enable in parallel modes, or serial clock input in serial mode. |+| 13 | CS | input | Active low chip-select signal; controls output driver tri-state mode. |+| 14 | BUSY | output | Active high digital output indicating analog-to-digital conversion in progress. |+| 15 | FRSTDATA | tri_state | Active high tri-state output indicating conversion data from channel 1 is being read. |+| 16 | DB0 | tri_state | Tri-state data output bit 0 (LSB) in parallel modes when CS and RD both low. |+| 17 | DB1 | tri_state | Tri-state data output bit 1 in parallel modes when CS and RD both low. |+| 18 | DB2 | tri_state | Tri-state data output bit 2 in parallel modes when CS and RD both low. |+| 19 | DB3 | tri_state | Tri-state data output bit 3 in parallel modes when CS and RD both low. |+| 20 | DB4 | tri_state | Tri-state data output bit 4 in parallel modes when CS and RD both low. |+| 21 | DB5 | tri_state | Tri-state data output bit 5 in parallel modes when CS and RD both low. |+| 22 | DB6 | tri_state | Tri-state data output bit 6 in parallel modes when CS and RD both low. |+| 23 | DVDD | power_in | Digital supply pin (2.3 V to 5.25 V); decouple to digital ground with 1-µF capacitor minimum. |+| 24 | DB7/DOUTA | tri_state | Multi-function tri-state output: data bit 7 in parallel mode, or first serial output in serial mode. |+| 25 | DB8/DOUTB | tri_state | Multi-function tri-state output: data bit 8 in parallel mode, or second serial output in serial mode. |+| 26 | AGND | power_in | Analog ground pin; connect to common ground plane. |+| 27 | DB9 | tri_state | Tri-state data output bit 9 in parallel modes when CS and RD both low. |+| 28 | DB10 | tri_state | Tri-state data output bit 10 in parallel modes when CS and RD both low. |+| 29 | DB11 | tri_state | Tri-state data output bit 11 in parallel modes when CS and RD both low. |+| 30 | DB12 | tri_state | Tri-state data output bit 12 in parallel modes when CS and RD both low. |+| 31 | DB13 | tri_state | Tri-state data output bit 13 in parallel modes when CS and RD both low. |+| 32 | DB14/HBEN | bidirectional | Tri-state data output bit 14 in parallel mode, or byte order select control in parallel byte mode. |+| 33 | DB15/BYTE SEL | bidirectional | Tri-state data output bit 15 (MSB) in parallel mode, or interface mode select control in non-parallel modes. |+| 34 | REFSEL | input | Active high logic input; selects internal 2.5-V reference (high) or external reference input (low). |+| 35 | AGND | power_in | Analog ground pin; connect to common ground plane. |+| 36 | REGCAP1 | output | Internal voltage regulator output pin; decouple separately to AGND with 1-µF capacitor. |+| 37 | AVDD | power_in | Analog supply pin (4.75 V to 5.25 V); decouple to AGND with 1-µF capacitor. |+| 38 | AVDD | power_in | Analog supply pin (4.75 V to 5.25 V); decouple to AGND with 1-µF capacitor. |+| 39 | REGCAP2 | output | Internal voltage regulator output pin; decouple separately to AGND with 1-µF capacitor. |+| 40 | AGND | power_in | Analog ground pin; connect to common ground plane. |+| 41 | AGND | power_in | Analog ground pin; connect to common ground plane. |+| 42 | REFIN/REFOUT | bidirectional | Internal 2.5-V reference output (REFSEL=high) or external reference input 2.475-2.525 V (REFSEL=low); decouple with 10-µF capacitor. |+| 43 | REFGND | power_in | Reference ground pin; connect to analog ground plane and decouple REFIN/REFOUT with 10-µF capacitor. |+| 44 | REFCAPA | output | Reference buffer output pin; externally short to REFCAPB and decouple to AGND with 10-µF capacitor. |+| 45 | REFCAPB | output | Reference buffer output pin; externally short to REFCAPA and decouple to AGND with 10-µF capacitor. |+| 46 | REFGND | power_in | Reference ground pin; connect to analog ground plane and decouple REFIN/REFOUT with 10-µF capacitor. |+| 47 | AGND | power_in | Analog ground pin; connect to common ground plane. |+| 48 | AVDD | power_in | Analog supply pin (4.75 V to 5.25 V); decouple to AGND with 1-µF capacitor. |+| 49 | AIN_1P | input | Channel 1 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin. |+| 50 | AIN_1GND | input | Channel 1 negative analog input; may be offset from AGND by ±0.3 V. |+| 51 | AIN_2P | input | Channel 2 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin. |+| 52 | AIN_2GND | input | Channel 2 negative analog input; may be offset from AGND by ±0.3 V. |+| 53 | AIN_3P | input | Channel 3 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin. |+| 54 | AIN_3GND | input | Channel 3 negative analog input; may be offset from AGND by ±0.3 V. |+| 55 | AIN_4P | input | Channel 4 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin. |+| 56 | AIN_4GND | input | Channel 4 negative analog input; may be offset from AGND by ±0.3 V. |+| 57 | AIN_5P | input | Channel 5 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin. |+| 58 | AIN_5GND | input | Channel 5 negative analog input; may be offset from AGND by ±0.3 V. |+| 59 | AIN_6P | input | Channel 6 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin. |+| 60 | AIN_6GND | input | Channel 6 negative analog input; may be offset from AGND by ±0.3 V. |+| 61 | AIN_7P | input | Channel 7 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin. |+| 62 | AIN_7GND | input | Channel 7 negative analog input; may be offset from AGND by ±0.3 V. |+| 63 | AIN_8P | input | Channel 8 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin. |+| 64 | AIN_8GND | input | Channel 8 negative analog input; may be offset from AGND by ±0.3 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | LQFP-64(10x10) |+| Category | Data Acquisition |+| Pins | 64 |++## CAD (KiCad official)++- Symbol: `ADS8588SIPMR`+- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`+- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)+- 3D model files: `ads8588sipmr-etched.step` / `ads8588sipmr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads8588sipmr.step` / `ads8588sipmr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads8588s) (62 pp, sha256 `a5e54af2bcb72584`, retrieved 2026-09-26, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ads8588sipmr-datasheet.pdf)
page.jsonadded+491
@@ -0,0 +1,491 @@+{+  "slug": "ads8588sipmr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Analog To Digital Converters (ADC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "data acquisition",+    "ads8588sipmr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ads8588sipmr.kicad_sym",+    "ads8588sipmr.kicad_mod",+    "ads8588sipmr.glb",+    "ads8588sipmr.step",+    "ads8588sipmr.lbr",+    "docs/hero.png",+    "docs/ads8588sipmr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "ADS8588SIPMR",+    "manufacturer": "Texas Instruments",+    "package": "LQFP-64(10x10)",+    "pin_count": 64,+    "category": "Data Acquisition",+    "subcategory": "Analog To Digital Converters (ADC)",+    "datasheet": "https://www.ti.com/cn/lit/gpn/ads8588s",+    "parts": {+      "symbol": "ads8588sipmr.kicad_sym",+      "footprint": "ads8588sipmr.kicad_mod",+      "model_3d": "ads8588sipmr-etched.glb",+      "model_3d_plain": "ads8588sipmr.glb",+      "model_3d_step": "ads8588sipmr-etched.step",+      "model_3d_step_plain": "ads8588sipmr.step",+      "lbr": "ads8588sipmr.lbr"+    },+    "distributor_links": {+      "lcsc": "C575544",+      "digikey": "296-45338-2-ND",+      "mouser": "595-ADS8588SIPMR"+    },+    "distributor_check": {+      "checked_at": "2026-09-26T20:28:09Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-45338-2-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-ADS8588SIPMR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "AVDD",+        "type": "power_in",+        "description": "Analog supply pin (4.75 V to 5.25 V); decouple to AGND with 1-µF capacitor."+      },+      {+        "number": "2",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground pin; connect to common ground plane."+      },+      {+        "number": "3",+        "name": "OS0",+        "type": "input",+        "description": "Oversampling mode control pin (LSB of OS[2:0])."+      },+      {+        "number": "4",+        "name": "OS1",+        "type": "input",+        "description": "Oversampling mode control pin (middle bit of OS[2:0])."+      },+      {+        "number": "5",+        "name": "OS2",+        "type": "input",+        "description": "Oversampling mode control pin (MSB of OS[2:0])."+      },+      {+        "number": "6",+        "name": "PAR/SER/BYTE SEL",+        "type": "input",+        "description": "Logic input to select parallel (low), serial (high with DB15/BYTE SEL=low), or parallel byte (high with DB15/BYTE SEL=high) interface mode."+      },+      {+        "number": "7",+        "name": "STBY",+        "type": "input",+        "description": "Active low logic input to enter standby or shutdown power-down mode depending on RANGE pin."+      },+      {+        "number": "8",+        "name": "RANGE",+        "type": "input",+        "description": "Multi-function: when STBY=high selects ±10 V (high) or ±5 V (low) input range; when STBY=low selects standby (high) or shutdown (low) mode."+      },+      {+        "number": "9",+        "name": "CONVSTA",+        "type": "input",+        "description": "Active high logic input to initiate simultaneous sampling of first half channels (1-4)."+      },+      {+        "number": "10",+        "name": "CONVSTB",+        "type": "input",+        "description": "Active high logic input to initiate simultaneous sampling of second half channels (5-8)."+      },+      {+        "number": "11",+        "name": "RESET",+        "type": "input",+        "description": "Active high logic input to reset device digital logic; minimum pulse width 50 ns."+      },+      {+        "number": "12",+        "name": "RD/SCLK",+        "type": "input",+        "description": "Active low read enable in parallel modes, or serial clock input in serial mode."+      },+      {+        "number": "13",+        "name": "CS",+        "type": "input",+        "description": "Active low chip-select signal; controls output driver tri-state mode."+      },+      {+        "number": "14",+        "name": "BUSY",+        "type": "output",+        "description": "Active high digital output indicating analog-to-digital conversion in progress."+      },+      {+        "number": "15",+        "name": "FRSTDATA",+        "type": "tri_state",+        "description": "Active high tri-state output indicating conversion data from channel 1 is being read."+      },+      {+        "number": "16",+        "name": "DB0",+        "type": "tri_state",+        "description": "Tri-state data output bit 0 (LSB) in parallel modes when CS and RD both low."+      },+      {+        "number": "17",+        "name": "DB1",+        "type": "tri_state",+        "description": "Tri-state data output bit 1 in parallel modes when CS and RD both low."+      },+      {+        "number": "18",+        "name": "DB2",+        "type": "tri_state",+        "description": "Tri-state data output bit 2 in parallel modes when CS and RD both low."+      },+      {+        "number": "19",+        "name": "DB3",+        "type": "tri_state",+        "description": "Tri-state data output bit 3 in parallel modes when CS and RD both low."+      },+      {+        "number": "20",+        "name": "DB4",+        "type": "tri_state",+        "description": "Tri-state data output bit 4 in parallel modes when CS and RD both low."+      },+      {+        "number": "21",+        "name": "DB5",+        "type": "tri_state",+        "description": "Tri-state data output bit 5 in parallel modes when CS and RD both low."+      },+      {+        "number": "22",+        "name": "DB6",+        "type": "tri_state",+        "description": "Tri-state data output bit 6 in parallel modes when CS and RD both low."+      },+      {+        "number": "23",+        "name": "DVDD",+        "type": "power_in",+        "description": "Digital supply pin (2.3 V to 5.25 V); decouple to digital ground with 1-µF capacitor minimum."+      },+      {+        "number": "24",+        "name": "DB7/DOUTA",+        "type": "tri_state",+        "description": "Multi-function tri-state output: data bit 7 in parallel mode, or first serial output in serial mode."+      },+      {+        "number": "25",+        "name": "DB8/DOUTB",+        "type": "tri_state",+        "description": "Multi-function tri-state output: data bit 8 in parallel mode, or second serial output in serial mode."+      },+      {+        "number": "26",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground pin; connect to common ground plane."+      },+      {+        "number": "27",+        "name": "DB9",+        "type": "tri_state",+        "description": "Tri-state data output bit 9 in parallel modes when CS and RD both low."+      },+      {+        "number": "28",+        "name": "DB10",+        "type": "tri_state",+        "description": "Tri-state data output bit 10 in parallel modes when CS and RD both low."+      },+      {+        "number": "29",+        "name": "DB11",+        "type": "tri_state",+        "description": "Tri-state data output bit 11 in parallel modes when CS and RD both low."+      },+      {+        "number": "30",+        "name": "DB12",+        "type": "tri_state",+        "description": "Tri-state data output bit 12 in parallel modes when CS and RD both low."+      },+      {+        "number": "31",+        "name": "DB13",+        "type": "tri_state",+        "description": "Tri-state data output bit 13 in parallel modes when CS and RD both low."+      },+      {+        "number": "32",+        "name": "DB14/HBEN",+        "type": "bidirectional",+        "description": "Tri-state data output bit 14 in parallel mode, or byte order select control in parallel byte mode."+      },+      {+        "number": "33",+        "name": "DB15/BYTE SEL",+        "type": "bidirectional",+        "description": "Tri-state data output bit 15 (MSB) in parallel mode, or interface mode select control in non-parallel modes."+      },+      {+        "number": "34",+        "name": "REFSEL",+        "type": "input",+        "description": "Active high logic input; selects internal 2.5-V reference (high) or external reference input (low)."+      },+      {+        "number": "35",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground pin; connect to common ground plane."+      },+      {+        "number": "36",+        "name": "REGCAP1",+        "type": "output",+        "description": "Internal voltage regulator output pin; decouple separately to AGND with 1-µF capacitor."+      },+      {+        "number": "37",+        "name": "AVDD",+        "type": "power_in",+        "description": "Analog supply pin (4.75 V to 5.25 V); decouple to AGND with 1-µF capacitor."+      },+      {+        "number": "38",+        "name": "AVDD",+        "type": "power_in",+        "description": "Analog supply pin (4.75 V to 5.25 V); decouple to AGND with 1-µF capacitor."+      },+      {+        "number": "39",+        "name": "REGCAP2",+        "type": "output",+        "description": "Internal voltage regulator output pin; decouple separately to AGND with 1-µF capacitor."+      },+      {+        "number": "40",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground pin; connect to common ground plane."+      },+      {+        "number": "41",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground pin; connect to common ground plane."+      },+      {+        "number": "42",+        "name": "REFIN/REFOUT",+        "type": "bidirectional",+        "description": "Internal 2.5-V reference output (REFSEL=high) or external reference input 2.475-2.525 V (REFSEL=low); decouple with 10-µF capacitor."+      },+      {+        "number": "43",+        "name": "REFGND",+        "type": "power_in",+        "description": "Reference ground pin; connect to analog ground plane and decouple REFIN/REFOUT with 10-µF capacitor."+      },+      {+        "number": "44",+        "name": "REFCAPA",+        "type": "output",+        "description": "Reference buffer output pin; externally short to REFCAPB and decouple to AGND with 10-µF capacitor."+      },+      {+        "number": "45",+        "name": "REFCAPB",+        "type": "output",+        "description": "Reference buffer output pin; externally short to REFCAPA and decouple to AGND with 10-µF capacitor."+      },+      {+        "number": "46",+        "name": "REFGND",+        "type": "power_in",+        "description": "Reference ground pin; connect to analog ground plane and decouple REFIN/REFOUT with 10-µF capacitor."+      },+      {+        "number": "47",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground pin; connect to common ground plane."+      },+      {+        "number": "48",+        "name": "AVDD",+        "type": "power_in",+        "description": "Analog supply pin (4.75 V to 5.25 V); decouple to AGND with 1-µF capacitor."+      },+      {+        "number": "49",+        "name": "AIN_1P",+        "type": "input",+        "description": "Channel 1 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin."+      },+      {+        "number": "50",+        "name": "AIN_1GND",+        "type": "input",+        "description": "Channel 1 negative analog input; may be offset from AGND by ±0.3 V."+      },+      {+        "number": "51",+        "name": "AIN_2P",+        "type": "input",+        "description": "Channel 2 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin."+      },+      {+        "number": "52",+        "name": "AIN_2GND",+        "type": "input",+        "description": "Channel 2 negative analog input; may be offset from AGND by ±0.3 V."+      },+      {+        "number": "53",+        "name": "AIN_3P",+        "type": "input",+        "description": "Channel 3 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin."+      },+      {+        "number": "54",+        "name": "AIN_3GND",+        "type": "input",+        "description": "Channel 3 negative analog input; may be offset from AGND by ±0.3 V."+      },+      {+        "number": "55",+        "name": "AIN_4P",+        "type": "input",+        "description": "Channel 4 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin."+      },+      {+        "number": "56",+        "name": "AIN_4GND",+        "type": "input",+        "description": "Channel 4 negative analog input; may be offset from AGND by ±0.3 V."+      },+      {+        "number": "57",+        "name": "AIN_5P",+        "type": "input",+        "description": "Channel 5 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin."+      },+      {+        "number": "58",+        "name": "AIN_5GND",+        "type": "input",+        "description": "Channel 5 negative analog input; may be offset from AGND by ±0.3 V."+      },+      {+        "number": "59",+        "name": "AIN_6P",+        "type": "input",+        "description": "Channel 6 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin."+      },+      {+        "number": "60",+        "name": "AIN_6GND",+        "type": "input",+        "description": "Channel 6 negative analog input; may be offset from AGND by ±0.3 V."+      },+      {+        "number": "61",+        "name": "AIN_7P",+        "type": "input",+        "description": "Channel 7 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin."+      },+      {+        "number": "62",+        "name": "AIN_7GND",+        "type": "input",+        "description": "Channel 7 negative analog input; may be offset from AGND by ±0.3 V."+      },+      {+        "number": "63",+        "name": "AIN_8P",+        "type": "input",+        "description": "Channel 8 positive analog input; 1 MΩ impedance; accepts ±10 V or ±5 V depending on RANGE pin."+      },+      {+        "number": "64",+        "name": "AIN_8GND",+        "type": "input",+        "description": "Channel 8 negative analog input; may be offset from AGND by ±0.3 V."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 62,+        "cost_usd": 0.6885,+        "at": "2026-09-26T20:27:41"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/ads8588s",+        "pages": 62,+        "sha256": "a5e54af2bcb72584",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 64,+        "described": 64,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file