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ADS1254E
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Texas Instruments Analog To Digital Converters (ADC), QSOP-20-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+56@@ -0,0 +1,56 @@+# ADS1254E++**Texas Instruments** · Analog To Digital Converters (ADC) · QSOP-20-150mil++ADS1254E from Texas Instruments, in a QSOP-20-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CH1+ | input | Positive input of first differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit |+| 2 | CH1- | input | Negative input of first differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit |+| 3 | CH2+ | input | Positive input of second differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit |+| 4 | CH2- | input | Negative input of second differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit |+| 5 | CH3+ | input | Positive input of third differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit |+| 6 | CH3- | input | Negative input of third differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit |+| 7 | AVDD | power_in | Analog power supply voltage input; requires 4.75V to 5.25V regulated DC supply with 0.8 to 1.15mA quiescent current draw at +5V |+| 8 | CLK | input | System clock input; CMOS-compatible Schmitt-Trigger clock operating from DC to 8MHz controlling modulator frequency and data output rate |+| 9 | DVDD | power_in | Digital power supply voltage input; requires 1.8V to 3.6V regulated DC supply with 0.2 to 0.4mA quiescent current draw at 1.8V |+| 10 | NC | unconnected | No connection; leave floating |+| 11 | NC | unconnected | No connection; leave floating |+| 12 | DGND | power_in | Digital ground reference; connect to digital ground plane as return path for digital power supply and signals |+| 13 | DOUT/DRDY | output | Serial data output and data-ready indicator; pulses LOW to indicate new 24-bit conversion result available, then shifts data MSB-first at SCLK falling edge up to 8MHz |+| 14 | SCLK | input | Serial clock input; CMOS-compatible Schmitt-Trigger clock operating to 8MHz with LOW normal state; holding HIGH for 4+ cycles synchronizes converters or 20+ cycles enters power-down mode |+| 15 | CHSEL1 | input | Channel select input bit 1 (MSB); Schmitt-Trigger digital input for selecting one of four analog input channels in combination with CHSEL0 |+| 16 | CHSEL0 | input | Channel select input bit 0 (LSB); Schmitt-Trigger digital input for selecting one of four analog input channels in combination with CHSEL1 |+| 17 | AGND | power_in | Analog ground reference; connect to analog ground plane separate from digital ground with single connection point between planes |+| 18 | VREF | power_in | Voltage reference input; accepts external reference from 0.5V to VDD with typical 4.096V setting ±4.096V full-scale range and drawing 32μA average current |+| 19 | CH4- | input | Negative input of fourth differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit |+| 20 | CH4+ | input | Positive input of fourth differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | QSOP-20-150mil |+| Category | Data Acquisition |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `ADS1254E`+- Footprint: `Package_SO:QSOP-20_3.9x8.7mm_P0.635mm`+- 3D model: QSOP-20-150mil (KiCad packages3D, STEP)+- 3D model files: `ads1254e-etched.step` / `ads1254e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ads1254e.step` / `ads1254e.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ads1254) (23 pp, sha256 `33559a0608db9cd9`, retrieved 2026-09-23, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ads1254e-datasheet.pdf)
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accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit"+ },+ {+ "number": "2",+ "name": "CH1–",+ "type": "input",+ "description": "Negative input of first differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit"+ },+ {+ "number": "3",+ "name": "CH2+",+ "type": "input",+ "description": "Positive input of second differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit"+ },+ {+ "number": "4",+ "name": "CH2–",+ "type": "input",+ "description": "Negative input of second differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit"+ },+ {+ "number": "5",+ "name": "CH3+",+ "type": "input",+ "description": "Positive input of third differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit"+ },+ {+ "number": "6",+ "name": "CH3–",+ "type": "input",+ "description": "Negative input of third differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit"+ },+ {+ "number": "7",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power supply voltage input; requires 4.75V to 5.25V regulated DC supply with 0.8 to 1.15mA quiescent current draw at +5V"+ },+ {+ "number": "8",+ "name": "CLK",+ "type": "input",+ "description": "System clock input; CMOS-compatible Schmitt-Trigger clock operating from DC to 8MHz controlling modulator frequency and data output rate"+ },+ {+ "number": "9",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital power supply voltage input; requires 1.8V to 3.6V regulated DC supply with 0.2 to 0.4mA quiescent current draw at 1.8V"+ },+ {+ "number": "10",+ "name": "NC",+ "type": "unconnected",+ "description": "No connection; leave floating"+ },+ {+ "number": "11",+ "name": "NC",+ "type": "unconnected",+ "description": "No connection; leave floating"+ },+ {+ "number": "12",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground reference; connect to digital ground plane as return path for digital power supply and signals"+ },+ {+ "number": "13",+ "name": "DOUT/DRDY",+ "type": "output",+ "description": "Serial data output and data-ready indicator; pulses LOW to indicate new 24-bit conversion result available, then shifts data MSB-first at SCLK falling edge up to 8MHz"+ },+ {+ "number": "14",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input; CMOS-compatible Schmitt-Trigger clock operating to 8MHz with LOW normal state; holding HIGH for 4+ cycles synchronizes converters or 20+ cycles enters power-down mode"+ },+ {+ "number": "15",+ "name": "CHSEL1",+ "type": "input",+ "description": "Channel select input bit 1 (MSB); Schmitt-Trigger digital input for selecting one of four analog input channels in combination with CHSEL0"+ },+ {+ "number": "16",+ "name": "CHSEL0",+ "type": "input",+ "description": "Channel select input bit 0 (LSB); Schmitt-Trigger digital input for selecting one of four analog input channels in combination with CHSEL1"+ },+ {+ "number": "17",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference; connect to analog ground plane separate from digital ground with single connection point between planes"+ },+ {+ "number": "18",+ "name": "VREF",+ "type": "power_in",+ "description": "Voltage reference input; accepts external reference from 0.5V to VDD with typical 4.096V setting ±4.096V full-scale range and drawing 32μA average current"+ },+ {+ "number": "19",+ "name": "CH4–",+ "type": "input",+ "description": "Negative input of fourth differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit"+ },+ {+ "number": "20",+ "name": "CH4+",+ "type": "input",+ "description": "Positive input of fourth differential analog channel; accepts ±VREF from AGND to AVDD with ±10mA continuous or ±100mA momentary input current limit"+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 23,+ "cost_usd": 0.3048,+ "at": "2026-09-23T20:25:01"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ads1254",+ "pages": 23,+ "sha256": "33559a0608db9cd9",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}