ADS1120

@@ -0,0 +1,61 @@+# ADS1120++**Texas Instruments** · Delta-sigma ADC · TSSOP-16++Small 16-bit delta-sigma ADC built for sensor front ends: it packs an input multiplexer, a programmable gain amplifier up to 128, an internal 2.048 V reference, and two matched current sources (IDACs) for exciting RTDs and thermistors. That lets it read a bridge, thermocouple, or RTD to full resolution with almost no external parts, over SPI, at up to 2 kSPS and well under a milliamp. A complete low-power measurement front end for temperature and pressure.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SCLK | input | SPI serial clock input (mode 1: CPOL=0, CPHA=1). Idle low; data shifted on rising/falling edges as defined by the timing spec. |+| 2 | CS | input | SPI chip-select input, active-low. Enables the serial interface; connect to DGND if the interface is always active (single-device systems). |+| 3 | CLK | input | External clock source input. Accepts 0.5 MHz to 4.5 MHz (nominal 4.096 MHz). Connect to DGND to select the internal oscillator. |+| 4 | DGND | power_in | Digital ground reference for DVDD and all digital I/O. |+| 5 | AVSS | power_in | Negative analog power supply. Unipolar operation: tie to DGND (0 V). Bipolar operation: nominally -2.5 V (AVDD-AVSS range 2.3 V to 5.5 V). |+| 6 | AIN3/REFN1 | input | Analog input channel 3, also negative reference input 1. An internal low-side power switch is connected between this pin and AVSS to allow bridge/RTD excitation control. |+| 7 | AIN2 | input | Analog input channel 2. Routed through the input MUX to the low-noise PGA and 16-bit delta-sigma modulator. |+| 8 | REFN0 | input | Negative reference input 0. Absolute voltage range AVSS-0.1 V to (VREFPx - 0.75 V); differential VREF 0.75 V to (AVDD-AVSS). |+| 9 | REFP0 | input | Positive reference input 0. Absolute voltage range (VREFNx + 0.75 V) to (AVDD + 0.1 V). |+| 10 | AIN1 | input | Analog input channel 1. Routed through the input MUX to the low-noise PGA and 16-bit delta-sigma modulator. |+| 11 | AIN0/REFP1 | input | Analog input channel 0, also positive reference input 1. Function selected via configuration registers. |+| 12 | AVDD | power_in | Positive analog power supply. 2.3 V to 5.5 V (AVDD - AVSS). Decouple with a 100 nF (or larger) capacitor to AVSS. |+| 13 | DVDD | power_in | Positive digital power supply. 2.3 V to 5.5 V (DVDD - DGND). Decouple with a 100 nF (or larger) capacitor to DGND. |+| 14 | DRDY | output | Data-ready output, active-low. Falls when a new conversion result is available in the output register. Leave unconnected or tie to DVDD via a weak pull-up if unused. |+| 15 | DOUT/DRDY | output | SPI serial data output (MISO), combined with data-ready indication (active-low). Driven on SCLK falling edges when CS is low. |+| 16 | DIN | input | SPI serial data input (MOSI). Sampled on SCLK rising edges when CS is low. |++## Key specifications++| Parameter | Value |+|---|---|+| Type | 16-bit delta-sigma ADC |+| Channels | 4 single-ended / 2 differential (mux) |+| PGA | Gain 1 to 128 |+| Reference | Internal 2.048 V or external |+| Excitation | Two matched IDACs (RTD/thermistor) |+| Data rate | Up to 2 kSPS |+| Supply | 2.3-5.5 V |+| Package | TSSOP-16 |++## Ordering variants++- `ADS1120IPW (TSSOP-16)`+- `ADS1120IPWR (TSSOP-16, tape & reel)`+- `ADS1120IRVAR (VQFN-16)`++## CAD (KiCad official)++- Symbol: `Analog_ADC:ADS1120-PW (KiCad official)`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/ads1120.pdf) (81 pp, sha256 `8ab70775ba04096c`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ads1120-datasheet.pdf)

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