project
Adom Custom Electronic Load
Public Made by Adomby adom
Independent compact digitally controlled load design for 3rdPartyFab; research and AIFlow evidence in progress
← Commit history
Start independent custom load design with sourced candidates and preliminary calculations
7 files changed
+273−2
README.md+28−2@@ -1,3 +1,29 @@-# Adom Custom Electronic Load+# ADOM custom electronic load: R0 architecture -Independent compact digitally controlled load design for 3rdPartyFab; research and AIFlow evidence in progress+Design in progress; no PCB or fabrication release yet.++## Proposed envelope+25 W continuous, 24 V maximum and 3 A maximum, simultaneously constrained. Initial DUT is the TPS54202 5 V / 1 A buck molecule. Ambient target 0–40 C is provisional. Cooling must establish the actual derating curve. Current setting target is 1 mA increments; calibrated accuracy target ±(0.2% reading + 1 mA), subject to full error budget and bench verification. These are design targets, not achieved specifications.++## Power and control+DUT+ -> fuse / reverse-protection path -> linear MOSFET -> four-terminal low-side shunt -> DUT-. An analog op-amp loop controls shunt voltage from a precision DAC. MCU supervises setpoints and measures voltage/current; the analog loop controls current continuously. USB CDC is primary, a 3.3 V UART is provisioned on machine contacts for future automatic wiring. Do not route USB D+/D- as arbitrary pincer wires.++Auxiliary 5 V from PS2 supplies logic and fan independently of DUT. A small boost stage supplies the MOSFET gate amplifier. USB power-domain and backfeed protection must be settled before schematic freeze. No galvanic isolation is claimed; DUT return, interface return and fixture grounds must be reviewed.++## Candidate parts+- IXTP64N10L2: TO-220 linear-rated MOSFET, 100 V, DC SOA graph at case 75 C, thetaJC max 0.35 C/W. Source: Littelfuse datasheet revision XZ 10/09/2023, pages 2 and 6. Mouser 300 on hand at $23.98 single / $14.07 at 100, retrieved 2026-10-07.+- DAC60501ZDGSR: 12-bit DAC, zero-scale reset, internal reference, same package family as the more costly DAC80501. Candidate $3.49 single. Resolution is not accuracy.+- OPA189IDBVR: precision zero-drift current servo candidate, max 3 uV offset at 25 C. Supersedes OPA197 candidate to improve low-current error.+- INA226: shunt/bus telemetry, ±81.92 mV shunt range. Exact Mouser stocked tape variant is INA226AIDGST; do not silently substitute packaging in purchasing.+- STM32G0B1KCT6: native USB, UART, I2C, timers and watchdog; industrial temperature variant. Pin multiplexing still to be checked against the manufacturer drawing.+- TPS61040: low-power boost candidate for gate-drive supply.+- Sunon MF40200V1-1000U-G99: candidate 40x40x20 mm 5 V three-wire tachometer fan. Heatsink/duct performance is not inferred from free-air CFM.++## Independent protection requirements+Gate defaults OFF without MCU power or during reset. A hardware watchdog and over-current/over-temperature shutdown must clamp the gate independently of software. Fan tach timeout, remote command lease expiry and implausible sensors latch OFF in firmware; explicit re-arm required. Reverse polarity, shorted pass transistor, connector current capability, auxiliary brownout and inductive lead interruption require analysis. A gate clamp cannot disconnect a failed-short MOSFET.++## Manufacturing+AIFlow loaded adom-3rdpartyfab-2L: 1.6 mm board, 1 oz copper. Apply conservative general 0.20 mm isolation, 0.25 mm signals and 0.60/0.30 mm via pad/drill unless a justified footprint escape needs otherwise. Power conductors sized separately. The pack comments and executable rules disagree on minimum via annulus (0.25/0.15 diameter implies 0.05 mm); the proposed via provides 0.15 mm annulus. Pack edge/clearance rules cover only tracks, so project-wide pad/zone checks must supplement them.++## Evidence boundaries+Research and a public datasheet-review clip are captured. Native KiCad 10 and shared service are available. Fusion app-state query timed out; no existing document was changed. AIFlow pre-board timeline is open, but its ordered KiCad steps require component/library/model proofs before the test-plan step. Design work is tracked as an explicit design stage; no gate has been bypassed.
design/calcs.jsonadded+52@@ -0,0 +1,52 @@+{+ "status": "preliminary calculations; hardware unverified",+ "envelope": {+ "max_V": 24,+ "max_A": 3,+ "max_W": 25,+ "I_at_max_V_A": 1.0416666666666667+ },+ "shunt": {+ "ohm": 0.02,+ "V_at_max_A": 0.06,+ "W_at_max_A": 0.18,+ "INA226_fullscale_V": 0.08192,+ "range_margin_V": 0.02192000000000001+ },+ "dac": {+ "bits": 12,+ "reference_V": 2.5,+ "divider_top_ohm": 39000,+ "divider_bottom_ohm": 1000,+ "full_scale_A": 3.125,+ "LSB_A": 0.000762939453125,+ "note": "Precision divider and DAC gain/reference tolerances must be added; 1% stock divider cannot meet precision target uncalibrated"+ },+ "offset_error": {+ "OPA189_25C_max_A": 0.00015000000000000001,+ "INA226_max_A": 0.0005,+ "note": "Offset only; not complete error budget"+ },+ "thermal": {+ "ambient_C": 40,+ "case_limit_C": 75,+ "interface_assumed_C_W": 0.5,+ "thetaJC_max_C_W": 0.35,+ "allowable_sink_C_W": 0.8999999999999999,+ "junction_C_at_case_limit": 83.75,+ "note": "Worst-case all load power placed in MOSFET; interface is an assumption, must verify actual insulator and spreading. Fan free-air CFM is not installed airflow."+ },+ "initial_DUT": {+ "V": 5,+ "A": 1,+ "W": 5+ },+ "open_items": [+ "Selected sink with local TO-220 heat spreading",+ "Actual contact current ratings",+ "Loop stability with vendor transistor model",+ "Temperature sensor lag and trip margin",+ "Complete error budget and calibration",+ "Independent power and reverse polarity protection"+ ]+}
design/calcs.pyadded+12@@ -0,0 +1,12 @@+#!/usr/bin/env python3+"""R0 first-order load calculations. No measured performance implied.+IXTP64N10L2 datasheet XZ 10/09/2023 p2/6; DACx0501 Rev E; INA226 Rev B.+Thermal interface, ambient and heatsink allowances are design assumptions.+"""+import json+from pathlib import Path+r=json.loads((Path(__file__).parents[1]/'requirements.json').read_text())+e=r['inputs'][0]; I=e['I_max_A']; P=e['P_continuous_W']; V=e['range_V'][1]+RS=0.020; REF=2.5; RTOP=39000; RBOT=1000+out={'status':'preliminary calculations; hardware unverified','envelope':{'max_V':V,'max_A':I,'max_W':P,'I_at_max_V_A':min(I,P/V)},'shunt':{'ohm':RS,'V_at_max_A':I*RS,'W_at_max_A':I*I*RS,'INA226_fullscale_V':.08192,'range_margin_V':.08192-I*RS},'dac':{'bits':12,'reference_V':REF,'divider_top_ohm':RTOP,'divider_bottom_ohm':RBOT,'full_scale_A':REF*RBOT/(RTOP+RBOT)/RS,'LSB_A':REF*RBOT/(RTOP+RBOT)/RS/4096,'note':'Precision divider and DAC gain/reference tolerances must be added; 1% stock divider cannot meet precision target uncalibrated'},'offset_error':{'OPA189_25C_max_A':3e-6/RS,'INA226_max_A':10e-6/RS,'note':'Offset only; not complete error budget'},'thermal':{'ambient_C':40,'case_limit_C':75,'interface_assumed_C_W':.5,'thetaJC_max_C_W':.35,'allowable_sink_C_W':(75-40)/P-.5,'junction_C_at_case_limit':75+P*.35,'note':'Worst-case all load power placed in MOSFET; interface is an assumption, must verify actual insulator and spreading. Fan free-air CFM is not installed airflow.'},'initial_DUT':{'V':5,'A':1,'W':5},'open_items':['Selected sink with local TO-220 heat spreading','Actual contact current ratings','Loop stability with vendor transistor model','Temperature sensor lag and trip margin','Complete error budget and calibration','Independent power and reverse polarity protection']}+(Path(__file__).parent/'calcs.json').write_text(json.dumps(out,indent=2));print(json.dumps(out,indent=2))
design/candidate-bom.csvadded+11@@ -0,0 +1,11 @@+ref,mpn,manufacturer,source,vendor_pn,stock_date,stock,unit_price_usd,status,source_url +U5,TPS61040DBVR,Texas Instruments,Mouser,595-TPS61040DBVR,2026-10-07,17748,$1.29,"candidate, design not frozen",https://www.mouser.com/en/ProductDetail/Texas-Instruments/TPS61040DBVR?qs=Gse6rAGbi78IU3cZg2VK0g%3D%3D +U3,OPA189IDBVR,Texas Instruments,Mouser,595-OPA189IDBVR,2026-10-07,68,$3.38,"candidate, design not frozen",https://www.mouser.com/en/ProductDetail/Texas-Instruments/OPA189IDBVR?qs=PzGy0jfpSMsrGOo5jUjslg%3D%3D +U1,STM32G0B1KCT6,STMicroelectronics,Mouser,511-STM32G0B1KCT6,2026-10-07,1500,$5.57,"candidate, design not frozen",https://www.mouser.com/en/ProductDetail/STMicroelectronics/STM32G0B1KCT6?qs=CiayqK2gdcLEGvHJgXHx9A%3D%3D +Q1,IXTP64N10L2,IXYS,Mouser,747-IXTP64N10L2,2026-10-07,300,$23.98,"candidate, design not frozen",https://www.mouser.com/en/ProductDetail/IXYS/IXTP64N10L2?qs=gQEZvVdd8GuRVq3qCu3o3A%3D%3D +U6,STWD100NYWY3F,STMicroelectronics,Mouser,511-STWD100NYWY3F,2026-10-07,292,$1.05,"candidate, design not frozen",https://www.mouser.com/en/ProductDetail/STMicroelectronics/STWD100NYWY3F?qs=jWm4idrLpzx15dHtESXwMQ%3D%3D +FAN1,MF40200V1-1000U-G99,Sunon,Mouser,369-MF40200V1100UG99,2026-10-07,11,$8.45,"candidate, design not frozen",https://www.mouser.com/en/ProductDetail/Sunon/MF40200V1-1000U-G99?qs=T3oQrply3y9%252BOxUowRCYgA%3D%3D +U4,INA226AIDGST,Texas Instruments,Mouser,595-INA226AIDGST,2026-10-07,8325,$4.98,"candidate, design not frozen",https://www.mouser.com/en/ProductDetail/Texas-Instruments/INA226AIDGST?qs=tQG3bEuiOZB3Ay2BJOjnEQ%3D%3D +U2,DAC60501ZDGSR,Texas Instruments,Mouser,595-DAC60501ZDGSR,2026-10-07,4294,$3.49,"candidate, design not frozen",https://www.mouser.com/en/ProductDetail/Texas-Instruments/DAC60501ZDGSR?qs=%252B6g0mu59x7JUdF3YSyQB0g%3D%3D +U7,LM339BIDR,Texas Instruments,Mouser,595-LM339BIDR,2026-10-07,10222,$0.26,"candidate, design not frozen",https://www.mouser.com/en/ProductDetail/Texas-Instruments/LM339BIDR?qs=HoCaDK9Nz5fv6%252BXVADj1RA%3D%3D +RSH1,LVK12R020DER,Ohmite,Mouser,588-LVK12R020DER,2026-10-07,43109,$1.11,"candidate, design not frozen",https://www.mouser.com/en/ProductDetail/Ohmite/LVK12R020DER?qs=o85cWoxxEjGVJdRt3s7KEQ%3D%3D
design/tests.jsonadded+66@@ -0,0 +1,66 @@+[+ {+ "id": "off",+ "net": "DUT_I",+ "kind": "dc",+ "expect": "Default off at power-up, reset and disconnected host",+ "what": "Default off at power-up, reset and disconnected host",+ "why": "Qualification requirement"+ },+ {+ "id": "cc",+ "net": "SHUNT_P",+ "kind": "dc",+ "expect": "0.1,0.5,1 A on 5V DUT; compare calibrated reference",+ "what": "0.1,0.5,1 A on 5V DUT; compare calibrated reference",+ "why": "Qualification requirement"+ },+ {+ "id": "v",+ "net": "DUT_SENSE",+ "kind": "dc",+ "expect": "Four-wire DUT voltage readback",+ "what": "Four-wire DUT voltage readback",+ "why": "Qualification requirement"+ },+ {+ "id": "gate",+ "net": "GATE",+ "kind": "waveform",+ "expect": "Stable loop, controlled step and hardware clamp",+ "what": "Stable loop, controlled step and hardware clamp",+ "why": "Qualification requirement"+ },+ {+ "id": "boost",+ "net": "V_GATE",+ "kind": "dc",+ "expect": "Gate supply valid before arm",+ "what": "Gate supply valid before arm",+ "why": "Qualification requirement"+ },+ {+ "id": "fan",+ "net": "FAN_TACH",+ "kind": "waveform",+ "expect": "Tach detected before enable; stalled fan latches off",+ "what": "Tach detected before enable; stalled fan latches off",+ "why": "Qualification requirement"+ },+ {+ "id": "fault",+ "net": "HW_OK",+ "kind": "waveform",+ "expect": "Watchdog and independent overtemperature interrupt load",+ "what": "Watchdog and independent overtemperature interrupt load",+ "why": "Qualification requirement"+ },+ {+ "id": "ground",+ "net": "GND",+ "kind": "ground",+ "expect": "Near each probe region",+ "what": "Near each probe region",+ "why": "Qualification requirement"+ }+]
docs/architecture.mdadded+29@@ -0,0 +1,29 @@+# ADOM custom electronic load: R0 architecture++Design in progress; no PCB or fabrication release yet.++## Proposed envelope+25 W continuous, 24 V maximum and 3 A maximum, simultaneously constrained. Initial DUT is the TPS54202 5 V / 1 A buck molecule. Ambient target 0–40 C is provisional. Cooling must establish the actual derating curve. Current setting target is 1 mA increments; calibrated accuracy target ±(0.2% reading + 1 mA), subject to full error budget and bench verification. These are design targets, not achieved specifications.++## Power and control+DUT+ -> fuse / reverse-protection path -> linear MOSFET -> four-terminal low-side shunt -> DUT-. An analog op-amp loop controls shunt voltage from a precision DAC. MCU supervises setpoints and measures voltage/current; the analog loop controls current continuously. USB CDC is primary, a 3.3 V UART is provisioned on machine contacts for future automatic wiring. Do not route USB D+/D- as arbitrary pincer wires.++Auxiliary 5 V from PS2 supplies logic and fan independently of DUT. A small boost stage supplies the MOSFET gate amplifier. USB power-domain and backfeed protection must be settled before schematic freeze. No galvanic isolation is claimed; DUT return, interface return and fixture grounds must be reviewed.++## Candidate parts+- IXTP64N10L2: TO-220 linear-rated MOSFET, 100 V, DC SOA graph at case 75 C, thetaJC max 0.35 C/W. Source: Littelfuse datasheet revision XZ 10/09/2023, pages 2 and 6. Mouser 300 on hand at $23.98 single / $14.07 at 100, retrieved 2026-10-07.+- DAC60501ZDGSR: 12-bit DAC, zero-scale reset, internal reference, same package family as the more costly DAC80501. Candidate $3.49 single. Resolution is not accuracy.+- OPA189IDBVR: precision zero-drift current servo candidate, max 3 uV offset at 25 C. Supersedes OPA197 candidate to improve low-current error.+- INA226: shunt/bus telemetry, ±81.92 mV shunt range. Exact Mouser stocked tape variant is INA226AIDGST; do not silently substitute packaging in purchasing.+- STM32G0B1KCT6: native USB, UART, I2C, timers and watchdog; industrial temperature variant. Pin multiplexing still to be checked against the manufacturer drawing.+- TPS61040: low-power boost candidate for gate-drive supply.+- Sunon MF40200V1-1000U-G99: candidate 40x40x20 mm 5 V three-wire tachometer fan. Heatsink/duct performance is not inferred from free-air CFM.++## Independent protection requirements+Gate defaults OFF without MCU power or during reset. A hardware watchdog and over-current/over-temperature shutdown must clamp the gate independently of software. Fan tach timeout, remote command lease expiry and implausible sensors latch OFF in firmware; explicit re-arm required. Reverse polarity, shorted pass transistor, connector current capability, auxiliary brownout and inductive lead interruption require analysis. A gate clamp cannot disconnect a failed-short MOSFET.++## Manufacturing+AIFlow loaded adom-3rdpartyfab-2L: 1.6 mm board, 1 oz copper. Apply conservative general 0.20 mm isolation, 0.25 mm signals and 0.60/0.30 mm via pad/drill unless a justified footprint escape needs otherwise. Power conductors sized separately. The pack comments and executable rules disagree on minimum via annulus (0.25/0.15 diameter implies 0.05 mm); the proposed via provides 0.15 mm annulus. Pack edge/clearance rules cover only tracks, so project-wide pad/zone checks must supplement them.++## Evidence boundaries+Research and a public datasheet-review clip are captured. Native KiCad 10 and shared service are available. Fusion app-state query timed out; no existing document was changed. AIFlow pre-board timeline is open, but its ordered KiCad steps require component/library/model proofs before the test-plan step. Design work is tracked as an explicit design stage; no gate has been bypassed.
requirements.jsonadded+75@@ -0,0 +1,75 @@+{+ "prompt": {+ "utc": "2026-10-07T17:49:14.482706+00:00",+ "timestamp_note": "Intake recorded after initial discovery; exact message timestamp unavailable. Do not claim prompt-to-finish timing."+ },+ "brief": {+ "kind": "chat",+ "quotes": [+ "custom version just for adom that you build from scratch using adom-aiflow",+ "as small as you can and as inexpensive as you can, but still industrial grade",+ "3rdPartyFab",+ "record video clips of you making this board"+ ]+ },+ "inputs": [+ {+ "name": "DUT",+ "range_V": [+ 0,+ 24+ ],+ "I_max_A": 3,+ "P_continuous_W": 25,+ "assumed": true,+ "why": "Proposed envelope pending user response; simultaneous limits apply"+ }+ ],+ "interfaces": {+ "control": [+ "USB serial candidate",+ "3.3V UART molecule contacts candidate"+ ],+ "power": [+ "DUT+",+ "DUT-",+ "auxiliary supply"+ ],+ "probe": [+ "current",+ "voltage",+ "temperature",+ "fault"+ ]+ },+ "formFactor": {+ "kind": "molecule",+ "fan": true,+ "size": "minimize within verified cooling and assembly limits"+ },+ "fab": {+ "target": "fab",+ "profile": "3rdPartyFab",+ "layers": 2+ },+ "sourcing": {+ "profile": "fab"+ },+ "deliverables": [+ "calculations",+ "sourced BOM",+ "schematic",+ "PCB",+ "3D",+ "firmware",+ "control-panel integration",+ "validation plan",+ "fabrication exports",+ "recorded build clips"+ ],+ "assumptions": [+ "No industrial qualification claimed before physical verification",+ "Existing 5V 1A buck is initial acceptance DUT",+ "Exact copper and fabrication limits must come from selected rule pack"+ ]+}