project
Adom Custom Electronic Load
Public Made by Adomby adom
Two-layer digitally controlled electronic-load prototype. Compact R11 is under active electrical, cooling and probe-access review; not a manufacturing release.
← Commit history
Record explicit-terminal current diagnostics and reviewed Fields walkthrough
6 files changed
+1152−1
design/spec-explicit-terminal-diagnostic.jsonadded+412@@ -0,0 +1,412 @@+{+ "board": "Adom electronic load R0, 64 x 72 mm, 2 layers; engineering prototype",+ "copperUm": 35,+ "clearance": 0.2,+ "edgeClearance": 0.2,+ "fixedRefs": [+ "MP1",+ "MP2",+ "MP3",+ "MP4",+ "J1",+ "J2",+ "J3",+ "J4",+ "J5",+ "J6",+ "J7"+ ],+ "wideNets": {+ "DUT_POS": [+ 2.0,+ 1.5,+ 1.2+ ],+ "DUT_FUSED": [+ 2.0,+ 1.5,+ 1.2+ ],+ "LOAD_POS": [+ 2.0,+ 1.5,+ 1.2+ ],+ "SHUNT_P": [+ 2.0,+ 1.5,+ 1.2+ ],+ "GND": [+ 2.0,+ 1.5,+ 1.2+ ]+ },+ "midNets": {+ "5V_AUX": [+ 0.5,+ 0.4+ ],+ "V_GATE": [+ 0.3,+ 0.25+ ]+ },+ "kelvin": {+ "U4.10": "RSH1.2",+ "U4.9": "RSH1.3"+ },+ "chains": [+ {+ "refs": [+ "R8",+ "R9",+ "R10"+ ],+ "direction": "down"+ },+ {+ "refs": [+ "R18",+ "R19"+ ],+ "direction": "down"+ },+ {+ "refs": [+ "R22",+ "R23"+ ],+ "direction": "down"+ },+ {+ "refs": [+ "R27",+ "R28"+ ],+ "direction": "down"+ },+ {+ "refs": [+ "R35",+ "R36",+ "R37"+ ],+ "direction": "down"+ }+ ],+ "loads": {+ "DUT_POS": {+ "amps": 3,+ "maxRiseC": 10,+ "terminals": [+ {+ "reference": "J1",+ "pad": "1",+ "amps": 3+ },+ {+ "reference": "F1",+ "pad": "1",+ "amps": -3+ }+ ]+ },+ "DUT_FUSED": {+ "amps": 3,+ "maxRiseC": 10,+ "terminals": [+ {+ "reference": "F1",+ "pad": "2",+ "amps": 3+ },+ {+ "reference": "D1",+ "pad": "2",+ "amps": -3+ }+ ]+ },+ "LOAD_POS": {+ "amps": 3,+ "maxRiseC": 10,+ "terminals": [+ {+ "reference": "D1",+ "pad": "1",+ "amps": 3+ },+ {+ "reference": "Q1",+ "pad": "2",+ "amps": -3+ }+ ]+ },+ "SHUNT_P": {+ "amps": 3,+ "maxRiseC": 10,+ "terminals": [+ {+ "reference": "Q1",+ "pad": "3",+ "amps": 3+ },+ {+ "reference": "RSH1",+ "pad": "1",+ "amps": -3+ }+ ]+ },+ "GND": {+ "amps": 3,+ "maxRiseC": 10,+ "terminals": [+ {+ "reference": "RSH1",+ "pad": "4",+ "amps": 3+ },+ {+ "reference": "J2",+ "pad": "1",+ "amps": -3+ }+ ]+ },+ "5V_AUX": {+ "amps": 0.3,+ "maxRiseC": 10+ }+ },+ "hot": {+ "Q1": {+ "watts": 5,+ "tabNet": "LOAD_POS",+ "maxRiseC": 15,+ "note": "Compact R0 5 W prototype target; 55 C case trip at assumed 40 C ambient unchanged. External heatsink remains required and unresolved; board-only solver is not cooling qualification."+ },+ "D1": {+ "watts": 1.65,+ "tabNet": "LOAD_POS"+ },+ "RSH1": {+ "watts": 0.18,+ "tabNet": "SHUNT_P"+ }+ },+ "hotMaxRiseC": 35,+ "pours": [+ {+ "net": "GND",+ "layers": [+ "B.Cu"+ ],+ "priority": 0,+ "connection": "solid",+ "name": "Power return and signal reference",+ "polygon": [+ [+ 98.3,+ 30.3+ ],+ [+ 161.7,+ 30.3+ ],+ [+ 161.7,+ 101.7+ ],+ [+ 98.3,+ 101.7+ ]+ ]+ },+ {+ "net": "GND",+ "layers": [+ "F.Cu"+ ],+ "priority": 0,+ "connection": "solid",+ "name": "Top return and shield",+ "polygon": [+ [+ 98.3,+ 30.3+ ],+ [+ 161.7,+ 30.3+ ],+ [+ 161.7,+ 101.7+ ],+ [+ 98.3,+ 101.7+ ]+ ]+ },+ {+ "name": "D1 heat spread front",+ "net": "LOAD_POS",+ "layers": [+ "F.Cu"+ ],+ "polygon": [+ [+ 106.5,+ 87.5+ ],+ [+ 114.5,+ 87.5+ ],+ [+ 114.5,+ 95+ ],+ [+ 106.5,+ 95+ ]+ ],+ "priority": 3,+ "connection": "solid",+ "clearance": 0.2,+ "minThickness": 0.25+ },+ {+ "name": "D1 heat spread back",+ "net": "LOAD_POS",+ "layers": [+ "B.Cu"+ ],+ "polygon": [+ [+ 106.5,+ 87.5+ ],+ [+ 114.5,+ 87.5+ ],+ [+ 114.5,+ 95+ ],+ [+ 106.5,+ 95+ ]+ ],+ "priority": 3,+ "connection": "solid",+ "clearance": 0.2,+ "minThickness": 0.25+ },+ {+ "name": "Shunt positive spread front",+ "net": "SHUNT_P",+ "layers": [+ "F.Cu"+ ],+ "polygon": [+ [+ 134.5,+ 84.7+ ],+ [+ 138,+ 84.7+ ],+ [+ 138,+ 88+ ],+ [+ 134.5,+ 88+ ]+ ],+ "priority": 3,+ "connection": "solid",+ "clearance": 0.2,+ "minThickness": 0.25+ },+ {+ "name": "Shunt positive spread back",+ "net": "SHUNT_P",+ "layers": [+ "B.Cu"+ ],+ "polygon": [+ [+ 134.5,+ 84.7+ ],+ [+ 138,+ 84.7+ ],+ [+ 138,+ 88+ ],+ [+ 134.5,+ 88+ ]+ ],+ "priority": 3,+ "connection": "solid",+ "clearance": 0.2,+ "minThickness": 0.25+ }+ ],+ "notPoured": [+ "BOOST_SW",+ "SERVO_FB",+ "SHUNT_P_SENSE",+ "SHUNT_N_SENSE",+ "I_SET",+ "DAC_OUT",+ "SET_DIV"+ ],+ "fab": {+ "rules": "fab",+ "target": "fab"+ },+ "sourcing": {+ "profile": "fab"+ },+ "molecule": {+ "pin": "medium",+ "gridMm": 2,+ "edgeMarginMm": 2,+ "cornerPinsNet": "GND"+ },+ "requireEvidence": [+ "calcs",+ "simulation"+ ],+ "qualificationNote": "Simultaneous 5 W/24 V/3 A limits; 3 A conductor, diode and shunt screens retained conservatively although initial DUT is 5 V/1 A. 25 W is a future option, not R0 rating. Actual cooling, USB and contact ratings remain unverified.",+ "planes": {+ "GND": "B.Cu"+ },+ "netClearance": {+ "USB_VBUS": 0.27+ },+ "stackupMm": [+ 1.53+ ],+ "dcMaxIterations": 60000,+ "diagnosticNote": "Explicit main-path diagnostic. Sense branches and alternate fixture returns are omitted boundary conditions; 5V_AUX retains heuristic allocation. Hot-part inputs preserved, but external Q1 heatsink absent. Not formal current/thermal acceptance."+}
design/spec-sense-branch-diagnostic.jsonadded+426@@ -0,0 +1,426 @@+{+ "board": "Adom electronic load R0, 64 x 72 mm, 2 layers; engineering prototype",+ "copperUm": 35,+ "clearance": 0.2,+ "edgeClearance": 0.2,+ "fixedRefs": [+ "MP1",+ "MP2",+ "MP3",+ "MP4",+ "J1",+ "J2",+ "J3",+ "J4",+ "J5",+ "J6",+ "J7"+ ],+ "wideNets": {+ "DUT_POS": [+ 2.0,+ 1.5,+ 1.2+ ],+ "DUT_FUSED": [+ 2.0,+ 1.5,+ 1.2+ ],+ "LOAD_POS": [+ 2.0,+ 1.5,+ 1.2+ ],+ "SHUNT_P": [+ 2.0,+ 1.5,+ 1.2+ ],+ "GND": [+ 2.0,+ 1.5,+ 1.2+ ]+ },+ "midNets": {+ "5V_AUX": [+ 0.5,+ 0.4+ ],+ "V_GATE": [+ 0.3,+ 0.25+ ]+ },+ "kelvin": {+ "U4.10": "RSH1.2",+ "U4.9": "RSH1.3"+ },+ "chains": [+ {+ "refs": [+ "R8",+ "R9",+ "R10"+ ],+ "direction": "down"+ },+ {+ "refs": [+ "R18",+ "R19"+ ],+ "direction": "down"+ },+ {+ "refs": [+ "R22",+ "R23"+ ],+ "direction": "down"+ },+ {+ "refs": [+ "R27",+ "R28"+ ],+ "direction": "down"+ },+ {+ "refs": [+ "R35",+ "R36",+ "R37"+ ],+ "direction": "down"+ }+ ],+ "loads": {+ "DUT_POS": {+ "amps": 3.000220385674931,+ "maxRiseC": 10,+ "terminals": [+ {+ "reference": "J1",+ "pad": "1",+ "amps": 3.000220385674931+ },+ {+ "reference": "F1",+ "pad": "1",+ "amps": -3+ },+ {+ "reference": "R24",+ "pad": "1",+ "amps": -0.00022038567493112948+ }+ ]+ },+ "DUT_FUSED": {+ "amps": 3,+ "maxRiseC": 10,+ "terminals": [+ {+ "reference": "F1",+ "pad": "2",+ "amps": 3+ },+ {+ "reference": "D1",+ "pad": "2",+ "amps": -3+ }+ ]+ },+ "LOAD_POS": {+ "amps": 3.0000289156626505,+ "maxRiseC": 10,+ "terminals": [+ {+ "reference": "D1",+ "pad": "1",+ "amps": 3.0000289156626505+ },+ {+ "reference": "Q1",+ "pad": "2",+ "amps": -3+ },+ {+ "reference": "U4",+ "pad": "8",+ "amps": -2.891566265060241e-05+ }+ ]+ },+ "SHUNT_P": {+ "amps": 3,+ "maxRiseC": 10,+ "terminals": [+ {+ "reference": "Q1",+ "pad": "3",+ "amps": 3+ },+ {+ "reference": "RSH1",+ "pad": "1",+ "amps": -3+ }+ ]+ },+ "GND": {+ "amps": 3,+ "maxRiseC": 10,+ "terminals": [+ {+ "reference": "RSH1",+ "pad": "4",+ "amps": 3+ },+ {+ "reference": "J2",+ "pad": "1",+ "amps": -3+ }+ ]+ },+ "5V_AUX": {+ "amps": 0.3,+ "maxRiseC": 10+ }+ },+ "hot": {+ "Q1": {+ "watts": 5,+ "tabNet": "LOAD_POS",+ "maxRiseC": 15,+ "note": "Compact R0 5 W prototype target; 55 C case trip at assumed 40 C ambient unchanged. External heatsink remains required and unresolved; board-only solver is not cooling qualification."+ },+ "D1": {+ "watts": 1.65,+ "tabNet": "LOAD_POS"+ },+ "RSH1": {+ "watts": 0.18,+ "tabNet": "SHUNT_P"+ }+ },+ "hotMaxRiseC": 35,+ "pours": [+ {+ "net": "GND",+ "layers": [+ "B.Cu"+ ],+ "priority": 0,+ "connection": "solid",+ "name": "Power return and signal reference",+ "polygon": [+ [+ 98.3,+ 30.3+ ],+ [+ 161.7,+ 30.3+ ],+ [+ 161.7,+ 101.7+ ],+ [+ 98.3,+ 101.7+ ]+ ]+ },+ {+ "net": "GND",+ "layers": [+ "F.Cu"+ ],+ "priority": 0,+ "connection": "solid",+ "name": "Top return and shield",+ "polygon": [+ [+ 98.3,+ 30.3+ ],+ [+ 161.7,+ 30.3+ ],+ [+ 161.7,+ 101.7+ ],+ [+ 98.3,+ 101.7+ ]+ ]+ },+ {+ "name": "D1 heat spread front",+ "net": "LOAD_POS",+ "layers": [+ "F.Cu"+ ],+ "polygon": [+ [+ 106.5,+ 87.5+ ],+ [+ 114.5,+ 87.5+ ],+ [+ 114.5,+ 95+ ],+ [+ 106.5,+ 95+ ]+ ],+ "priority": 3,+ "connection": "solid",+ "clearance": 0.2,+ "minThickness": 0.25+ },+ {+ "name": "D1 heat spread back",+ "net": "LOAD_POS",+ "layers": [+ "B.Cu"+ ],+ "polygon": [+ [+ 106.5,+ 87.5+ ],+ [+ 114.5,+ 87.5+ ],+ [+ 114.5,+ 95+ ],+ [+ 106.5,+ 95+ ]+ ],+ "priority": 3,+ "connection": "solid",+ "clearance": 0.2,+ "minThickness": 0.25+ },+ {+ "name": "Shunt positive spread front",+ "net": "SHUNT_P",+ "layers": [+ "F.Cu"+ ],+ "polygon": [+ [+ 134.5,+ 84.7+ ],+ [+ 138,+ 84.7+ ],+ [+ 138,+ 88+ ],+ [+ 134.5,+ 88+ ]+ ],+ "priority": 3,+ "connection": "solid",+ "clearance": 0.2,+ "minThickness": 0.25+ },+ {+ "name": "Shunt positive spread back",+ "net": "SHUNT_P",+ "layers": [+ "B.Cu"+ ],+ "polygon": [+ [+ 134.5,+ 84.7+ ],+ [+ 138,+ 84.7+ ],+ [+ 138,+ 88+ ],+ [+ 134.5,+ 88+ ]+ ],+ "priority": 3,+ "connection": "solid",+ "clearance": 0.2,+ "minThickness": 0.25+ }+ ],+ "notPoured": [+ "BOOST_SW",+ "SERVO_FB",+ "SHUNT_P_SENSE",+ "SHUNT_N_SENSE",+ "I_SET",+ "DAC_OUT",+ "SET_DIV"+ ],+ "fab": {+ "rules": "fab",+ "target": "fab"+ },+ "sourcing": {+ "profile": "fab"+ },+ "molecule": {+ "pin": "medium",+ "gridMm": 2,+ "edgeMarginMm": 2,+ "cornerPinsNet": "GND"+ },+ "requireEvidence": [+ "calcs",+ "simulation"+ ],+ "qualificationNote": "Simultaneous 5 W/24 V/3 A limits; 3 A conductor, diode and shunt screens retained conservatively although initial DUT is 5 V/1 A. 25 W is a future option, not R0 rating. Actual cooling, USB and contact ratings remain unverified.",+ "planes": {+ "GND": "B.Cu"+ },+ "netClearance": {+ "USB_VBUS": 0.27+ },+ "stackupMm": [+ 1.53+ ],+ "dcMaxIterations": 60000,+ "diagnosticNote": "Explicit main-path diagnostic. Sense branches and alternate fixture returns are omitted boundary conditions; 5V_AUX retains heuristic allocation. Hot-part inputs preserved, but external Q1 heatsink absent. Not formal current/thermal acceptance.",+ "branchAssumptions": {+ "DUT_POS": "24 V across a 100k/10k series divider, both -1 percent; full 3 A F1 path retained. ADC input leakage is not included.",+ "LOAD_POS": "INA226 VBUS nominal 830 kohm (typical, no max specified here) gives 28.916 uA at 24 V. Nominal-only boundary, not guaranteed maximum."+ }+}
design/step12-explicit-terminal-summary.jsonadded+275@@ -0,0 +1,275 @@+{+ "createdAt": "2026-10-10T11:13:24.892387+00:00",+ "kind": "explicit-terminal-source-candidate-diagnostic",+ "formalAcceptance": false,+ "boardIdentity": {+ "algorithm": "sha256",+ "board": "54f1aab0a34622d1c3675c13f4aeb7a678b0cee8b5a4d3bfd7484b10edb8dcf6",+ "solverVersion": "0.6.2",+ "spec": "c86fd760c97cf32ba32482d8e13fd4368cacc0b575cc5c79e206ef42bafbc740"+ },+ "reportSha256": "1d39adeba57acfe109442cf4631abdf3b2af77b4874d09b67c6bf3fac12b4499",+ "solverBinarySha256": "ba36096b4c34d6ce9fb5acb058fa751adf02fb454b804f5abab673e6f206a012",+ "sourceBase": "a12b30f6cd5bf87af73cae2e62420529c5b14449",+ "dependency": "adom/adom-fields PR 5, unmerged",+ "nets": [+ {+ "amps": 3.0,+ "copperMm2": 46.6,+ "iterations": 254,+ "jouleW": 0.026,+ "layers": [+ "F.Cu",+ "B.Cu"+ ],+ "net": "SHUNT_P",+ "peakAt": [+ 126.89999999999999,+ 83.3+ ],+ "peakJ": 57.9,+ "peakLayer": "B.Cu",+ "platedPads": 1,+ "residual": 9.920461353185108e-08,+ "vias": 7+ },+ {+ "amps": 3.0,+ "copperMm2": 159.2,+ "iterations": 733,+ "jouleW": 0.027,+ "layers": [+ "F.Cu",+ "B.Cu"+ ],+ "net": "LOAD_POS",+ "peakAt": [+ 126.89999999999999,+ 83.1+ ],+ "peakJ": 47.8,+ "peakLayer": "F.Cu",+ "platedPads": 1,+ "residual": 9.802577915257518e-08,+ "vias": 15+ },+ {+ "amps": 3.0,+ "copperMm2": 71.8,+ "iterations": 647,+ "jouleW": 0.014,+ "layers": [+ "F.Cu",+ "B.Cu"+ ],+ "net": "DUT_POS",+ "peakAt": [+ 106.89999999999999,+ 93.69999999999999+ ],+ "peakJ": 42.7,+ "peakLayer": "F.Cu",+ "platedPads": 1,+ "residual": 8.536666784782914e-08,+ "vias": 2+ },+ {+ "amps": 3.0,+ "copperMm2": 5211.5,+ "iterations": 7021,+ "jouleW": 0.053,+ "layers": [+ "F.Cu",+ "B.Cu"+ ],+ "net": "GND",+ "peakAt": [+ 138.29999999999998,+ 92.5+ ],+ "peakJ": 42.7,+ "peakLayer": "F.Cu",+ "platedPads": 14,+ "residual": 9.83067050263189e-08,+ "vias": 48+ },+ {+ "amps": 3.0,+ "copperMm2": 19.7,+ "iterations": 147,+ "jouleW": 0.003,+ "layers": [+ "F.Cu",+ "B.Cu"+ ],+ "net": "DUT_FUSED",+ "peakAt": [+ 108.89999999999999,+ 91.9+ ],+ "peakJ": 42.3,+ "peakLayer": "F.Cu",+ "platedPads": 0,+ "residual": 7.208780991872171e-08,+ "vias": 2+ },+ {+ "amps": 0.3,+ "copperMm2": 66.6,+ "iterations": 756,+ "jouleW": 0.001,+ "layers": [+ "F.Cu",+ "B.Cu"+ ],+ "net": "5V_AUX",+ "peakAt": [+ 153.9,+ 88.3+ ],+ "peakJ": 10.9,+ "peakLayer": "F.Cu",+ "platedPads": 2,+ "residual": 8.34572086330967e-08,+ "vias": 7+ }+ ],+ "terminalAssignments": {+ "5V_AUX": {+ "mode": "heuristic",+ "pins": null+ },+ "DUT_FUSED": {+ "mode": "explicit",+ "pins": [+ {+ "amps": 3.0,+ "pad": "2",+ "reference": "F1"+ },+ {+ "amps": -3.0,+ "pad": "2",+ "reference": "D1"+ }+ ]+ },+ "DUT_POS": {+ "mode": "explicit",+ "pins": [+ {+ "amps": 3.0,+ "pad": "1",+ "reference": "J1"+ },+ {+ "amps": -3.0,+ "pad": "1",+ "reference": "F1"+ }+ ]+ },+ "GND": {+ "mode": "explicit",+ "pins": [+ {+ "amps": 3.0,+ "pad": "4",+ "reference": "RSH1"+ },+ {+ "amps": -3.0,+ "pad": "1",+ "reference": "J2"+ }+ ]+ },+ "LOAD_POS": {+ "mode": "explicit",+ "pins": [+ {+ "amps": 3.0,+ "pad": "1",+ "reference": "D1"+ },+ {+ "amps": -3.0,+ "pad": "2",+ "reference": "Q1"+ }+ ]+ },+ "SHUNT_P": {+ "mode": "explicit",+ "pins": [+ {+ "amps": 3.0,+ "pad": "3",+ "reference": "Q1"+ },+ {+ "amps": -3.0,+ "pad": "1",+ "reference": "RSH1"+ }+ ]+ }+ },+ "issues": [+ {+ "at": [+ 117.4,+ 91.0+ ],+ "fix": "More copper under the tab and more vias to the other layers, or a heatsink; moving air alone does not bring it in.",+ "kind": "tab-rise",+ "layer": "F.Cu",+ "net": "LOAD_POS",+ "reference": "D1",+ "severity": "high",+ "what": "D1: +217 \u00b0C at its tab in still air (+138 \u00b0C in moving air) against a 35 \u00b0C budget"+ },+ {+ "at": [+ 127.46,+ 82.0+ ],+ "fix": "More copper under the tab and more vias to the other layers, or a heatsink; moving air alone does not bring it in.",+ "kind": "tab-rise",+ "layer": "F.Cu",+ "net": "LOAD_POS",+ "reference": "Q1",+ "severity": "high",+ "what": "Q1: +469 \u00b0C at its tab in still air (+389 \u00b0C in moving air) against a 35 \u00b0C budget"+ },+ {+ "at": [+ 136.625,+ 85.7+ ],+ "fix": "More copper under the tab and more vias to the other layers, or a heatsink; moving air alone does not bring it in.",+ "kind": "tab-rise",+ "layer": "F.Cu",+ "net": "SHUNT_P",+ "reference": "RSH1",+ "severity": "high",+ "what": "RSH1: +163 \u00b0C at its tab in still air (+93 \u00b0C in moving air) against a 35 \u00b0C budget"+ }+ ],+ "limits": [+ "5V_AUX remains heuristic",+ "Main load paths omit sense currents and alternate fixture returns",+ "Existing 1 mm terminal injection approximation retained",+ "No external Q1 heatsink modeled; thermal results do not represent proposed cooled assembly",+ "No AIFlow gate passed; current heuristic integration remains pending"+ ],+ "ownerReview": {+ "url": "https://wiki.adom.inc/adom/adom-fields/prs/6",+ "status": "open",+ "dependency": "PR 5",+ "sourceMerged": false,+ "installedSharedRuntimeChanged": false,+ "testsPassed": 25,+ "submittedDiffVerified": true+ }+}
docs/explicit-terminal-analysis.mdadded+11@@ -0,0 +1,11 @@+# Explicit terminal current diagnostic++The current gate remains open. The previous width-only check assigns the whole 3 A net load to the narrow DUT voltage-sense branch and to a secondary parallel fuse trace. The replacement needs actual circuit boundary conditions, rather than a waiver of the conductor limits.++On 10 October an isolated Fields source candidate added signed pin currents, uniqueness/net validation, balanced source/sink totals and refusal to publish partially solved loaded nets. It is based on the unmerged physical two-layer-stack branch at `a12b30f6cd5bf87af73cae2e62420529c5b14449`; it does not replace installed Fields 0.6.2. All 25 combined tests and production compilation passed. The new regressions cover a fuse/diode path with a separate sense sink, current reversal and rejection when a terminal has no copper.++The actual saved board-19 diagnostic at 0.2 mm uses explicit 3 A main paths for DUT_POS, DUT_FUSED, LOAD_POS, SHUNT_P and GND. All six loaded nets converged below 1e-7 residual; peak density is 57.9 A/mm² on SHUNT_P against the unchanged 60 A/mm² screen. Other main nets are 42.3–47.8 A/mm². The auxiliary supply still uses heuristic terminal allocation. Exact input identities, assignments, source candidate and binary identity are in `design/step12-explicit-terminal-summary.json`.++This is not a current-gate pass. Main-path boundary conditions omit sense currents and alternate fixture returns. The existing terminal injection uses a 1 mm neighborhood, not exact package contacts. Full branch/auxiliary scenarios, resolution sensitivity and integration with AIFlow's conservative conductor screen remain required.++All three hot-part checks still fail in the board-only model. Its Q1 heat is incorrectly constrained to the board for the intended external case-mounted heatsink assembly, which is absent from this solve. These temperatures must not be presented as a prediction of the proposed cooled assembly, and the current results must not be presented as thermal qualification. No finish or fabrication acceptance was recorded.
tools/sweep_aux_current.pyadded+21@@ -0,0 +1,21 @@+#!/usr/bin/env python3+"""Conditional DC envelope: 0.3 A from J3.1 to each auxiliary consumer in turn."""+import hashlib,json,subprocess,sys+from pathlib import Path+root=Path(__file__).resolve().parents[1]+solver=Path(sys.argv[1]).resolve()+base=json.loads((root/'design/spec-current-mesh.json').read_text())+board=root/'aiflow/run/board-19.kicad_pcb'+rows=[]+for ref,pad in [('J9','1'),('U9','1'),('U9','3'),('U5','4'),('U5','5'),('L1','1')]:+ out=root/'design/aux-current-envelope'/f'{ref}-{pad}';out.mkdir(parents=True,exist_ok=True)+ spec={'board':f'Auxiliary DC diagnostic J3.1 to {ref}.{pad}', 'copperUm':base['copperUm'],'stackupMm':base['stackupMm'],'dcMaxIterations':base['dcMaxIterations'],'loads':{'5V_AUX':{'amps':0.3,'maxRiseC':10,'terminals':[{'reference':'J3','pad':'1','amps':0.3},{'reference':ref,'pad':pad,'amps':-0.3}]}},'hot':{}}+ p=out/'spec.json';p.write_text(json.dumps(spec,indent=2)+'\n')+ with (out/'solve.log').open('w') as log:+ r=subprocess.run([str(solver),'analyze','--board',str(board),'--spec',str(p),'--out',str(out),'--pitch','0.2','--no-parts'],stdout=log,stderr=subprocess.STDOUT)+ if r.returncode:raise SystemExit(f'{ref}.{pad}: solver failed; see {out}/solve.log')+ f=json.loads((out/'fields.json').read_text());assert len(f['nets'])==1+ rows.append({'sink':f'{ref}.{pad}','inputIdentity':f['inputIdentity'],'result':f['nets'][0],'issues':f['issues']})+ print(ref,pad,'peakJ',f['nets'][0]['peakJ'],flush=True)+report={'kind':'conditional-auxiliary-DC-envelope','formalAcceptance':False,'boardSha256':hashlib.sha256(board.read_bytes()).hexdigest(),'solverSha256':hashlib.sha256(solver.read_bytes()).hexdigest(),'source':'J3.1','totalAmps':0.3,'cases':rows,'limits':['Assumes J3.1 is sole 5 V source and total continuous current <= 0.3 A; budget must be validated separately','One consumer pin gets the entire current in each case; linear DC combinations are bounded by these cases at fixed conductivity','Capacitor startup and boost switching pulses excluded; this is not a transient or thermal acceptance','No heat-source or external heatsink qualification; fixed nominal copper and plating']}+(root/'design/aux-current-envelope/summary.json').write_text(json.dumps(report,indent=2)+'\n')
videos/inventory.json+7−1@@ -1,5 +1,5 @@ {- "rawTakeCount": 67,+ "rawTakeCount": 68, "reviewedExcerptCount": 16, "countingRule": "Unique raw window recording filenames in this project; excludes derivative action/speed exports and reference projects. Raw count includes rejected takes.", "takes": [@@ -404,6 +404,12 @@ "topic": "Current-step entry before field solve", "durationSeconds": 23.3, "review": "Contact sheet reviewed: static PCB; exclude from final action edit. No visible corner edit or field solve shown."+ },+ {+ "file": "videos/window-5969372-20261010-111347.mp4",+ "durationSeconds": 45.0,+ "topic": "Explicit-terminal Fields diagnostic: fuse path, shunt bottleneck and ground return",+ "review": "Full decode passed and six-frame contact sheet reviewed. Real live viewer selection/camera actions; thermal failures remain visible. Label as diagnostic with omitted sense/fixture branches, not a gate pass; use a short accelerated excerpt." } ] }