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Document same-input current comparison and correct current MOSFET candidate

John Lauer ·80cf3317a5 ·17d ago ·parent 04a7e28
3 files changed +105−1
design/thermal-regions-current-comparison.jsonadded+102
@@ -0,0 +1,102 @@+{+  "boardSha256": "e1d1d49643d675dddc7d7bcd81331562f18719ecefe0b41dcf46fec4bbeec195",+  "cellMm": 0.2,+  "ampsPerPath": 3,+  "rows": [+    {+      "net": "DUT_FUSED",+      "beforePeakAmm2": 95.4,+      "afterPeakAmm2": 95.4,+      "beforeJouleW": 0.04,+      "afterJouleW": 0.04,+      "residual": 8.264198593536778e-08+    },+    {+      "net": "SHUNT_P",+      "beforePeakAmm2": 96.2,+      "afterPeakAmm2": 92.3,+      "beforeJouleW": 0.043,+      "afterJouleW": 0.041,+      "residual": 8.785233466394163e-08+    },+    {+      "net": "LOAD_POS",+      "beforePeakAmm2": 89.7,+      "afterPeakAmm2": 83.0,+      "beforeJouleW": 0.079,+      "afterJouleW": 0.073,+      "residual": 9.73208466907506e-08+    },+    {+      "net": "DUT_POS",+      "beforePeakAmm2": 65.1,+      "afterPeakAmm2": 65.1,+      "beforeJouleW": 0.024,+      "afterJouleW": 0.024,+      "residual": 9.24849413188654e-08+    },+    {+      "net": "GND",+      "beforePeakAmm2": 24.8,+      "afterPeakAmm2": 25.0,+      "beforeJouleW": 0.027,+      "afterJouleW": 0.028,+      "residual": 9.839913233416197e-08+    }+  ],+  "issues": [+    {+      "at": [+        109.1,+        88.9+      ],+      "fix": "Widen the neck or add a parallel path on the other layer with vias; the density map shows where the current squeezes.",+      "kind": "current-neck",+      "layer": "F.Cu",+      "net": "DUT_FUSED",+      "reference": null,+      "severity": "medium",+      "what": "DUT_FUSED: 95 A/mm\u00b2 at its worst point on F.Cu (3 A through a neck about 0.90 mm wide at 35 \u00b5m; the threshold is 60 A/mm\u00b2)"+    },+    {+      "at": [+        106.89999999999999,+        93.69999999999999+      ],+      "fix": "Widen the neck or add a parallel path on the other layer with vias; the density map shows where the current squeezes.",+      "kind": "current-neck",+      "layer": "F.Cu",+      "net": "DUT_POS",+      "reference": null,+      "severity": "medium",+      "what": "DUT_POS: 65 A/mm\u00b2 at its worst point on F.Cu (3 A through a neck about 1.32 mm wide at 35 \u00b5m; the threshold is 60 A/mm\u00b2)"+    },+    {+      "at": [+        122.3,+        80.3+      ],+      "fix": "Widen the neck or add a parallel path on the other layer with vias; the density map shows where the current squeezes.",+      "kind": "current-neck",+      "layer": "B.Cu",+      "net": "LOAD_POS",+      "reference": null,+      "severity": "medium",+      "what": "LOAD_POS: 83 A/mm\u00b2 at its worst point on B.Cu (3 A through a neck about 1.03 mm wide at 35 \u00b5m; the threshold is 60 A/mm\u00b2)"+    },+    {+      "at": [+        134.7,+        84.69999999999999+      ],+      "fix": "Widen the neck or add a parallel path on the other layer with vias; the density map shows where the current squeezes.",+      "kind": "current-neck",+      "layer": "F.Cu",+      "net": "SHUNT_P",+      "reference": null,+      "severity": "medium",+      "what": "SHUNT_P: 92 A/mm\u00b2 at its worst point on F.Cu (3 A through a neck about 0.93 mm wide at 35 \u00b5m; the threshold is 60 A/mm\u00b2)"+    }+  ],+  "qualification": "Experimental solver electrical screen with explicit terminals; not assembly thermal or industrial qualification."+}
docs/architecture.md+1−1
@@ -11,7 +11,7 @@ DUT+ -> fuse / reverse-protection path -> linear MOSFET -> four-terminal low-sid Auxiliary 5 V from PS2 supplies logic and fan independently of DUT. A small boost stage supplies the MOSFET gate amplifier. USB power-domain and backfeed protection must be settled before schematic freeze. No galvanic isolation is claimed; DUT return, interface return and fixture grounds must be reviewed.  ## Candidate parts-- IXTP64N10L2: TO-220 linear-rated MOSFET, 100 V, DC SOA graph at case 75 C, thetaJC max 0.35 C/W. Source: Littelfuse datasheet revision XZ 10/09/2023, pages 2 and 6. Mouser 300 on hand at $23.98 single / $14.07 at 100, retrieved 2026-10-07.+- IXTP15N50L2 is the current Q1 BOM candidate, replacing the earlier IXTP64N10L2. The saved single-unit listing is $12.84; see the [cost record](cost/README.md). Device-specific SOA, gate compliance, mounted cooling and loop qualification remain required; the earlier part's ratings must not be applied to this substitution. - DAC60501ZDGSR: 12-bit DAC, zero-scale reset, internal reference, same package family as the more costly DAC80501. Candidate $3.49 single. Resolution is not accuracy. - OPA189IDBVR: precision zero-drift current servo candidate, max 3 uV offset at 25 C. Supersedes OPA197 candidate to improve low-current error. - INA226: shunt/bus telemetry, ±81.92 mV shunt range. Exact Mouser stocked tape variant is INA226AIDGST; do not silently substitute packaging in purchasing.
docs/thermal-copper-review.md+2
@@ -7,3 +7,5 @@ The initial dense via array collided with routed signals. After pruning it, one The zone-area comparison is native filled-polygon area, not total copper union or measured thermal improvement. Ground-area loss and isolated region connectivity were checked through refill and native DRC. Full current/thermal acceptance remains pending. The 5 W bring-up ceiling and unresolved 25 W design target remain unchanged.  Evidence: [saved DRC](../design/thermal-regions-saved-drc.json), [saved geometry audit](../design/thermal-regions-saved-audit.json), [fill comparison](../design/thermal-regions-fill-comparison.json), and [recorded additions](build-clips.md).++The same 3 A, 0.2 mm explicit-terminal electrical screen converged on all five power paths. LOAD_POS peak density decreases from 89.7 to 83.0 A/mm² and SHUNT_P from 96.2 to 92.3 A/mm². Summed modeled conductor loss decreases from 0.213 to 0.206 W; GND loss increases from 0.027 to 0.028 W as power regions replace ground area. Four neck flags remain. These are mesh-dependent screening values, not operating ratings. [Comparison](../design/thermal-regions-current-comparison.json).