Adom Chip Laser

@@ -25,6 +25,39 @@ curl -X POST "https://laserchip-6dn1tl7vjz5u.adom.cloud/etch?mpn=STM32F103C8T6"  No cadquery needed on your end — any Adom app can call the service. +## Marking checklist (read before you etch)++The raw `/etch` endpoint writes the MPN across **X** at the size `frac` gives it and repaints the+whole part black and grey. It does not know the part's long axis, its end caps, pin 1 or the+standard pose, so on its own it often puts the text across the short side, upside down, or onto the+terminations. For a component model, use the planner that wraps the shared STEP service:++```bash+adom-aiflow-etch --in part.step --mpn <MPN> --out part-etched.step --footprint part.kicad_mod+adom-aiflow-etch check part-etched.step        # must say PASS; look at part-etched.check.png+```++(`adom-aiflow-etch` ships with adom/adom-aiflow 0.1.48+: plain python3, nothing to install.)++The rule it enforces:++1. **Along the longest usable dimension** of the marking face: chip R/C/L along the body, in the+   band between the metal end caps; ICs parallel to the pin rows (a SOT-23-6 along its 2.9 mm+   length); side-marked LEDs along the long side wall, window clear.+2. **As large as fits**: the band minus 10 to 15 % margins each side, one line; two lines only when+   that makes the text larger.+3. **Upright, left to right, in the standard pose**: pin 1 / pad 1 lower left seen from the top+   (two-terminal: pad 1 on the left; polarised parts follow pin 1 / cathode). The iso outline then+   shows pin 1 toward the viewer and the text reads without tilting your head.+4. **Flat light mark, coplanar with the face**, in `Adom.Chip` / `Adom.LaserEtch`; never raised or+   recessed lettering.+5. **The chip outline's name is the same mark**: same face, direction and place+   (`adom-aiflow-etch outline part.step --etched part-etched.step --footprint part.kicad_mod`).+6. **Look at the result at widget size before you report** (the gate reports the cap height in+   pixels at 320 px and prints `Hint:` lines saying what to rerun when it fails).++Use `/etch` directly only for a quick look at a simple Z-up IC whose long axis is already X.+ ## CLI  ```bash

@@ -36,6 +36,39 @@ For the **full 3D deliverables** (etched chip GLB with real materials + animated board GLB with a toggleable `laser_etch` layer), use the Python `board` command in the source repo `adom-inc/adom-chip-laser` (needs cadquery + the `step2glb` service). +## Marking checklist (read before you etch)++The raw `/etch` endpoint writes the MPN across **X** at the size `frac` gives it and repaints the+whole part black and grey. It does not know the part's long axis, its end caps, pin 1 or the+standard pose, so on its own it often puts the text across the short side, upside down, or onto the+terminations. For a component model, use the planner that wraps the shared STEP service:++```bash+adom-aiflow-etch --in part.step --mpn <MPN> --out part-etched.step --footprint part.kicad_mod+adom-aiflow-etch check part-etched.step        # must say PASS; look at part-etched.check.png+```++(`adom-aiflow-etch` ships with adom/adom-aiflow 0.1.48+: plain python3, nothing to install.)++The rule it enforces:++1. **Along the longest usable dimension** of the marking face: chip R/C/L along the body, in the+   band between the metal end caps; ICs parallel to the pin rows (a SOT-23-6 along its 2.9 mm+   length); side-marked LEDs along the long side wall, window clear.+2. **As large as fits**: the band minus 10 to 15 % margins each side, one line; two lines only when+   that makes the text larger.+3. **Upright, left to right, in the standard pose**: pin 1 / pad 1 lower left seen from the top+   (two-terminal: pad 1 on the left; polarised parts follow pin 1 / cathode). The iso outline then+   shows pin 1 toward the viewer and the text reads without tilting your head.+4. **Flat light mark, coplanar with the face**, in `Adom.Chip` / `Adom.LaserEtch`; never raised or+   recessed lettering.+5. **The chip outline's name is the same mark**: same face, direction and place+   (`adom-aiflow-etch outline part.step --etched part-etched.step --footprint part.kicad_mod`).+6. **Look at the result at widget size before you report** (the gate reports the cap height in+   pixels at 320 px and prints `Hint:` lines saying what to rerun when it fails).++Use `/etch` directly only for a quick look at a simple Z-up IC whose long axis is already X.+ ## Why STEP-layer  Fusion imports a library via the **STEP**, not a GLB — and a laser mark on black

@@ -12,6 +12,8 @@ case "${1:-}" in     [ -f "$step" ] && [ -n "$mpn" ] || { echo "usage: adom-chip-laser etch <chip.step> <MPN> [out.step] [frac]"; exit 1; }     if curl -sf -X POST "$SVC/etch?mpn=$mpn&frac=$frac" --data-binary @"$step" -o "$out"; then       echo "etched $mpn -> $out"+      echo "Hint: /etch writes across X at frac $frac and repaints the part; it does not know the long axis, end caps or pin 1."+      echo "Hint: for a component model use: adom-aiflow-etch --in $step --mpn $mpn --out <part-etched.step> --footprint <part.kicad_mod>, then adom-aiflow-etch check (Marking checklist in this skill)"     else       echo "etch failed (service: $SVC)"; exit 1     fi ;;

@@ -12,6 +12,8 @@ case "${1:-}" in     [ -f "$step" ] && [ -n "$mpn" ] || { echo "usage: adom-chip-laser etch <chip.step> <MPN> [out.step] [frac]"; exit 1; }     if curl -sf -X POST "$SVC/etch?mpn=$mpn&frac=$frac" --data-binary @"$step" -o "$out"; then       echo "etched $mpn -> $out"+      echo "Hint: /etch writes across X at frac $frac and repaints the part; it does not know the long axis, end caps or pin 1."+      echo "Hint: for a component model use: adom-aiflow-etch --in $step --mpn $mpn --out <part-etched.step> --footprint <part.kicad_mod>, then adom-aiflow-etch check (Marking checklist in this skill)"     else       echo "etch failed (service: $SVC)"; exit 1     fi ;;