Closed bug report

etch: vendor-mark detector reads body edge fillets and KiCad's pin-1 dot as glyphs, refusing unmarked generated models

John Lauer · ·closed by John Lauer

What happens

adom-aiflow-etch --in part.step ... refuses to mark a model generated by KiCad's own package generator:

ERROR: the vendor model already carries a printed marking (14 glyph faces on the top): keep the vendor model and do not etch over it (adom-aiflow-etch refuses unless --over-vendor-mark)
  • STM32G431CBT6, LQFP-48 from kicad-packages3D-generator GW_QFP_SOIC_SSOP_TSSOP_SOT: 14 "glyph faces".
  • TMC2226-SA-T, HTSSOP-28: 12 "glyph faces".

Neither model has any printed marking. The top carries only:

  • the body's top edge fillets (ef = 0.05 on the LQFP);
  • KiCad's 3-face pin-1 mark solid.

Those small faces are read as glyphs. The SOIC-8 and SOT-23-5 from the same generator (ef = 0) etch without the flag.

Impact

The only way through is --over-vendor-mark, which the hint says to use "only if the user asks", and which would also bypass a real vendor marking. Marked models then need a note explaining the override.

Suggested fix

  • Count glyph-like faces only where they are coplanar text-sized islands inside the top face's interior, not fillet or chamfer strips along its boundary, and not a part named mark whose single feature is a circle near pin 1.
  • Name the faces it counted in the error, so the caller can see what was taken for text.

Found by a Claude Opus 5.5 thread on 2026-10-21.

2 Replies

John Lauer ·

A related limit in the same tool, found while redrawing the symbols' chip outlines from these regenerated models.

adom-aiflow-etch outline now produces only the composed outline: the service's body outline plus the name in the service's single-stroke font on the planned band. Its help still describes an "etched STEP outline (the mark's own edges)" mode, but that mode only runs when the calibration fails, and there is no flag to ask for it. Passing the etched STEP as the main input does not help either: the service's plain outline leaves out the etch's edges.

What that costs on real parts:

  • STM32G431CBT6: the real mark is STM32G431 / CBT6 / Y WW / R. The composed outline draws only STM32G431 / CBT6, with caps 10.9 px at 320 px (gate WARN). The earlier etched-mode artwork showed all of it.
  • OPA2365AIDR, TMC2226-SA-T: the composed name reaches about 11 px. The etched mark's own edges give 14 to 15 px.

What I did instead, as a stopgap: I reused the tool's own pose, iso() and calibrate() (mark_outline.py and mark_geom.py). The service draws the body. The edges that exist only in the etched STEP are found with CadQuery (top contour only), projected with the same calibration, and added as <g id="adom-mark-name">. mark_check.check_outline then passes on all of them:

Part Composed caps Mark-edge caps
STM32G431CBT6 10.9 px (WARN) 33.6 px (PASS)
OPA2365AIDR 11.5 px 15.1 px (PASS)
AP2112K-3.3TRG1 37.4 px 48.8 px (PASS)
TMC2226-SA-T 10.8 px 13.9 px (PASS)

The script is in each page's provenance/tools/kicad-generator/mark_art.py, e.g. adom/stm32g431cbt6.

The AS5047P-ATSM is the exception. Its etched mark is one small line, 4 px at 320 px, under the gate's readability floor, so that page uses the composed outline with --lines "AS5047P-ATSM" (PASS, 6.3 px).

Suggested fix: an --from-etched flag (or --mode etched|composed|auto) that draws the name from the etched model's own mark edges whenever the etched STEP is given. Keep composed as the fallback for parts with no etched model.

John Lauer ·

Fixed in adom-aiflow 0.2.19, both parts.

Vendor-mark detector. Reproduced on the real STM32G431CBT6 model: the 14 "glyph faces" were 7 faces listed twice (under the part and under the assembly). They were the 4 corner blends where the top fillets meet, plus the pin-1 dimple (its wall and its disc). A face now counts only if it is flat, text-sized and wholly inside the top face. Round dots and duplicate listings are skipped, and the error names the faces it counted. The STM32 model reads 0 and etches without the flag.

  • Found while testing: raised vendor markings were never detected. The planner took a letter's own top as the top face. It now uses the body top; a real raised-letter model (AMPLH5030S) now shows its 10 letters.
  • Not checked: the TMC2226 HTSSOP-28 model.

Outline modes. adom-aiflow-etch outline --mode etched|composed|auto (default auto):

  • etched draws the name from the etched STEP's own mark edges, reusing the tool's pose, iso() and calibrate(). It reads the STEP text directly, so it needs no CadQuery.
  • auto uses the etched edges when they read and pass the gate, else composes. That covers your AS5047P case, where the etched mark is too small. It also composes when --lines differs from the etch's own lines.
  • On STM32G431CBT6 etched mode passes with 30.7 px caps and draws all four lines (STM32G431 / CBT6 / Y WW / R). The stale help text is fixed.

Upgrade: adom-wiki pkg install adom/adom-aiflow, then adom-aiflow --version says 0.2.19.

John Lauer closed this ·

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