AI Flow
Public Made by Adomby adom
Adom's AI Flow: a tool to help the AI follow all of the steps it takes to build a board.
export: BOM and CPL are not accepted by JLCPCB's assembly upload (AI Flow columns, KiCad rotations), yet export says verified
Version: adom-aiflow 0.2.56 (local build 0.2.56+noah.1), KiCad lane, kicad-cli 10.0.6. Board: noah/rgbcct-canfd-led-driver (run fab target fab, the 3rd party fab profile).
What happened: the board was ordered at JLCPCB with the files export wrote (<run>/manufacturing/board-31-bom.csv and board-31-cpl.csv). JLCPCB's assembly upload refused the BOM: "File processing failed, please check your file and upload again."
- The BOM
exportwrites has AI Flow's own columns,Reference,Qty,Value,Footprint,Manufacturer,MPN,DNP, with the references space-separated (C2 C3 C4). JLCPCB's BOM needsComment, Designator, Footprint, LCSC Part #, with the designators comma-separated in one cell. - The CPL is kicad-cli's raw position file (
Ref,Val,Package,PosX,PosY,Rot,Side). JLCPCB needsDesignator, Mid X, Mid Y, Layer, Rotation. Its rotation and origin must be those of LCSC's own (EasyEDA) footprint, and those differ from KiCad's on many parts. On this board: D1 BAT54CW 0 -> 180, D4 LED 0 -> 180, J1/J2 JST PH 0 -> 180 with the origin moved from pin 1, J7 FTSH-107 90 -> 0. Parts placed at KiCad's rotation come out wrong. exportstill reportsverified: ... yesand FAB-NOTES gives no hint that these files are not for any fab's uploader.
This is the second board to hit it: the LED strip run (adom/led-strip-500-rgbw) had to write its own jlcpcb_files.py.
Expected:
exportwrites the order files for the fab the board is going to: for JLCPCB,BOM-jlcpcb.csvandCPL-jlcpcb.csvin their columns, with LCSC numbers from the sourcing record. It could keep the generic files beside them.- The CPL rotation and position come from the LCSC footprint fitted onto the board's pads (easyeda2kicad gives the footprint), never KiCad's origin.
- The export check validates the order files against the fab's schema, and names any part without an LCSC number or short at JLCPCB.
- FAB-NOTES says which fab each file is for.
Workaround used: kicad/jlcpcb_files.py in the project. It reads the board, maps each MPN to LCSC with punctuation ignored, reads live stock (adom-jlcpcb part), fits each part's EasyEDA footprint (0/90/180/270, RMS pad residual under 0.12 mm) and writes both files plus a review sheet. Happy to send it as a PR if wanted.
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