Closed bug report

Net ties (net_tie_pad_groups) flagged as missing courtyards and as overlapping the shunt they tie

noah · ·closed by John Lauer

0.2.51; unchanged in 0.2.54 (no net-tie handling in placement_verify.rs or mechanical.rs).

What happened. AM32 ESC v1 has a 0.3 mOhm shunt R411 with two Kelvin net ties (NetTie:NetTie-2_SMD_Pad0.5mm, NT401 and NT402) on its pads, by design. KiCad's DRC is clean. AI Flow reports:

  • place verify: native placement has unresolved courtyardOverlaps: NT401 and R411 (F.Cu); NT402 and R411 (F.Cu). KiCad's net-tie footprints have no courtyard, so the bridge boxes their pads + 0.25 mm.
  • gate and finish: 2 footprint(s) without a courtyard (F.CrtYd/B.CrtYd): NT401, NT402, with the hint to draw one "from the datasheet land pattern".

The only excuses in the code are for spec.fixedRefs pairs or an owner-approved assembly contact (which needs sourced part bodies), neither of which fits a net tie. The AI is pointed at either faking a courtyard or a deviation.

Ask. Treat footprints with net_tie_pad_groups (KiCad's net-tie marker) as copper artwork: no courtyard required, and a net tie overlapping only the pads of the parts it ties is not a placement overlap.

2 Replies

noah ·

One more detail: KiCad already marks these footprints. NetTie-2_SMD_Pad0.5mm carries (attr exclude_from_bom allow_missing_courtyard) on this board, and KiCad's own DRC honours it (0 errors). AI Flow could read allow_missing_courtyard as well as net_tie_pad_groups.

John Lauer ·

Thanks Noah, and thanks for the follow-up about allow_missing_courtyard: that is the cleaner signal and AI Flow now reads both.

What was wrong. AI Flow's own courtyard rule (the gate's mechanical check and place verify) had one exemption: a footprint with no pads. It never looked at KiCad's own markers, so NT401 and NT402 were called missing courtyards even though KiCad's DRC honours allow_missing_courtyard. And place verify took the bridge's box overlaps at face value: a net tie has no courtyard, so the bridge boxes its pads plus 0.25 mm, which always lands on the shunt it ties. The only excuses were spec.fixedRefs pairs and owner-approved assembly contacts, neither of which fits a net tie, so the hint pointed you at faking a courtyard.

What changed (in adom-aiflow 0.2.56).

  • A footprint carrying net_tie_pad_groups, or marked (attr ... allow_missing_courtyard), needs no courtyard. gate, finish and the mechanical check list it as exempt with the reason ("net tie (net_tie_pad_groups): copper artwork, KiCad asks no courtyard of it", or "KiCad attribute allow_missing_courtyard") instead of as a missing courtyard.
  • A net tie is copper, not a part body, so it is left out of the body overlap check too.
  • place verify: a courtyard overlap between a net tie and a part that carries one of the nets the tie joins (NT401 on R411's VBAT pad, for example) is the tie doing its job, not a collision. It is recorded under excused.netTies with the reason, and the OK line counts it. A net tie overlapping a part whose nets it does not tie is still named, and KiCad's placement DRC must still be clean, as before.

How it was verified. A unit test builds your case: a 2512 shunt R411 on VBAT/PGND with two NetTie-2_SMD_Pad0.5mm ties (no courtyard, allow_missing_courtyard) on its pads, the bridge reporting NT401 and R411, NT402 and R411 and both ties without a courtyard. place verify accepts it and records four net-tie entries. A net tie reported against an unrelated resistor is still flagged by name. The mechanical check shows no missing courtyards and no body overlaps, and a plain resistor with its courtyard removed is still named. All unit tests and workflow suites pass.

Still open. When AI Flow itself moves a net tie (place pack / land moves), its packing still treats the tie's pads plus 0.25 mm as its footprint box. That only affects where it would put a tie, not the checks above.

Upgrade: tell your AI "give me the latest adom-aiflow" (or adom-wiki pkg install adom/adom-aiflow); adom-aiflow --version says 0.2.56.

John Lauer closed this ·

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