Require drill-void and plated-wall current evidence; preserve native copper net intent
Reject display-clipped current maxima in Fields acceptance
Add explicit branch-current screening with mandatory converged Fields validation
Release 0.1.78: refuse premature completion and require an executable finish-line check
0.1.69: silkscreen and test-pad rules from the Fusion buck review
AI Flow 0.1.65: fab-ready Fusion export (test points out, machine parts DNP); heatsink vias planned on the live board w…
AI Flow 0.1.64: Fusion library names uppercase (ADD cannot find a lowercase part name); a stranded native Fusion dialog…
AI Flow 0.1.63: the timeline is titled from the design in the brief, not the whole instruction
AI Flow 0.1.61: the lane comes from the brief and requirements (a Fusion run is a Fusion run from intake), and can stil…
AI Flow 0.1.60: no step can be skipped (sequence + proofs), the timeline dashboard, design rules step (3rdPartyFab), te…
AI Flow 0.1.59: fusion library remakes parts made by an older adom-lbr or older orientation rules
AI Flow 0.1.58: Fusion parts for the fields view; Hydrogen layout kept (chat left, webviews right)
AI Flow 0.1.57: window focus per step, board framed by its outline, simulation required before placement on Fusion proj…
AI Flow 0.1.56: KiCad 10 net references in the Fusion converter; via size as a [size, drill] pair
AI Flow 0.1.55: Fusion flow in build order; 3D restored on the board; fusion view3d; library-name clash guard; schemati…
AI Flow 0.1.54: 3D models checked for which way is up; missing 3D named; the AI told to look
AI Flow 0.1.53: Fusion step clips framed on the board, small-board silkscreen text, adom-lbr dependency
AI Flow 0.1.52: fusion steps default to the primary machine
AI Flow 0.1.51: the Fusion project commands (release)
AI Flow 0.1.50: the Fusion lane (release)
0.1.49: named outlines compose the single-stroke name in every style (two-line names, hairline)
0.1.48: mark planner, legibility gate and named outline = the mark (laser etch by construction, shared service only)
0.1.47: pads and test points are real copper (board-glb copper + check gate, mask and paste from the footprint layers)
0.1.46: readable schematics, Adom IC symbols, rounded molecule corners, process-video skill
0.1.45: side-face etch for LEDs, every MPN part marked
0.1.44: etch mark seated on the body, --along, part-marking board rules
0.1.43: local STEP processing on cadquery-ocp-novtk (398 MB instead of 1.3 GB)