AI Flow

@@ -14,7 +14,7 @@ members = [ ]  [workspace.package]-version = "0.1.29"+version = "0.1.30" edition = "2021" license = "MIT" repository = "https://wiki.adom.inc/adom/adom-aiflow"

@@ -177,3 +177,7 @@ Placement checks compare individual native DRC findings with the baseline, not j Latest maintenance: [0.1.28 lifecycle and native IPC readiness](docs/release-0.1.28.md).  [0.1.29: reliable component tours and explicit zone ownership](docs/release-0.1.29.md).++## Optional thermal assemblies and signal screening++Adom Fields 0.4.0 adds conducting heatsink blocks, copper thickness per layer and a Signals view for plane-overlap capacitance, differential-pair skew, reference coverage and microstrip estimates. AI Flow hints direct the AI to use explicit assembly and stackup data and keep unsupported cases visible. [Fields inputs, sources, limits and fixture](https://wiki.adom.inc/adom/adom-fields/files/docs/heatsinks-and-signals.md).

@@ -158,3 +158,9 @@ A pour's area or presence is not proof of current capacity or acceptable tempera Placement checks compare individual native DRC findings with the baseline, not just their counts. Conservative courtyard bounding boxes guide packing but do not override native courtyard checks. Project `.kicad_pro` and `.kicad_dru` constraints follow board snapshots. When present, they require a native `kicad-cli` (optionally set `ADOM_AIFLOW_KICAD_CLI`); the single-file headless service must not silently discard them. Manufacturing-rule warnings, including hole spacing, remain blocking.  Component library footage: keep the full `library-tour` separate. A reviewed five-second `library-overview` artifact may enter compose, with `--review` binding the exact selected STEP/GLB variants, current board, clip and native readback/screenshot. See [the review contract](https://wiki.adom.inc/adom/adom-aiflow/files/docs/library-overview-review.md). Never claim native model matching from a tour alone.++## Optional conducting heatsinks and signal checks++Fields 0.4.0 supports specified rectangular conducting blocks, per-layer copper thickness, and a Signals view. Read its `docs/heatsinks-and-signals.md` before adding `heatsinks`, `copperUmByLayer`, or `signals` to the run spec. Model only real proposed assembly geometry with justified conductivity/contact and dielectric data. Never invent a heatsink or change the load to make a gate pass. Re-solve after spec changes so input hashes remain valid.++For high-speed nets, explicitly define capacitance or differential-pair checks with consistent stackup and reference copper. `adom-fields ui --port 8874 view --quantity signals` shows the results. Record unsupported cases and limitations; a screening estimate is not manufacturing or signal-integrity qualification. Native EDA model/text/zone primitives remain bridge-owned; pending bridge PRs are not deployed capabilities.

@@ -2030,7 +2030,7 @@ fn main() {                 "current" => "Now do the analysis yourself, not only this table: draw the current density on the copper (amps per square millimetre on every loaded net's pours and tracks; a Laplace solve on the filled copper between the source pads and the sink pads is enough, the board file has the filled polygons) as a 1920x1080 PNG with a colour scale, then `artifact --kind analysis-image --file <png> --caption \"...\"`. It becomes a fullscreen shot in the final video and a figure on the run page.".to_string(),                 _ => "Now do the analysis yourself, not only this table, as two drawings: first the heat flow in the copper, layer by layer like the current picture (a multi-layer solve: each hot tab's watts spreading on its layer and going down through its vias to the other layers, watts per millimetre of width, with the vias drawn and each chip's split between its layer, its vias and the bare dielectric); then the temperature rise over the whole board (the same solve read as temperature, the FR4 spreading). Each a 1920x1080 PNG with a colour scale, registered in that order with `artifact --kind analysis-image --file <png> --caption \"...\"` (`--replaces <old png>` when you redo one). They become fullscreen shots in the final video and figures on the run page.".to_string(),             };-            let fields_hint = "adom-fields does this solve for you and shows it on the board in 3D: `adom-fields analyze --board <current board> --spec <spec> --out fields` (about two minutes), `adom-fields serve --fields fields &`, then under the fields step `tour fields` films the walkthrough; its screenshots are drawings you can register with `artifact`.".to_string();+            let fields_hint = "Adom Fields 0.4.0 also supports specified conducting heatsinks, per-layer copper thickness, and an optional Signals view for overlap capacitance and differential-pair screening. Read its heatsinks-and-signals guide; use real assembly/material data, never invent a heatsink to pass this gate. Unsupported signal geometry is not a passing impedance result. adom-fields does this solve for you and shows it on the board in 3D: `adom-fields analyze --board <current board> --spec <spec> --out fields` (about two minutes), `adom-fields serve --fields fields &`, then under the fields step `tour fields` films the walkthrough; its screenshots are drawings you can register with `artifact`.".to_string();             let walk = if pour_nets.is_empty() { String::new() } else { format!("Then walk the pours this analysis judged on camera, under this same step: `tour nets --nets {}` (each net lit as a whole, pours and traces together, framed).", pour_nets.join(",")) };             if !passed {                 err(&format!("{what} analysis not passed: {field_note}\n{}", lines.join("\n")), &["Fix what the failing lines say (pours, vias, widths, or placement), land it, measure again, then analyze again.".into(), draw, walk]);

@@ -1,7 +1,7 @@ {   "slug": "adom-aiflow",   "type": "app",-  "version": "0.1.29",+  "version": "0.1.30",   "title": "AI Flow",   "description": "Adom's AI Flow: a tool to help the AI follow all of the steps it takes to build a board. One Rust binary with a crate per step (placement helpers, a grid router with Kelvin taps, pours with keepouts, KiCad's DRC gate, live landing through the KiCad Bridge, copper measurement, current and thermal analysis) and a finish line that refuses an unfinished board. Every command answers with hints for the AI; every turn, its thinking time and every rework loop go into run.jsonl, so Claude, Codex and any other engine are compared on the same flow. KiCad today; Altium, Fusion and Adom's own web apps next.",   "summary": "Adom's AI Flow: a tool to help the AI follow all of the steps it takes to build a board. The AI thinks its way from placement through routing, pours, current and thermal analysis to a delivered video; the binary does the fast, deterministic parts of every step, hands back hints, and keeps a ledger of every turn, every return to an earlier step, and the clock from the prompt to done.",

@@ -166,3 +166,9 @@ Component library footage: keep the full `library-tour` separate. A reviewed fiv Tours use the complete pinned canonical viewer release, served locally with the tour. On a viewer load error, rebuild with `tools/library-tour.py build --manifest <selection.json> --out <tour-dir>` and inspect the explicit error before recording. Native variants and tour selection must agree, including pin-one markers and the chosen LED/MPN state.  Zone ownership comes only from successful native creation item IDs recorded by this run. Never infer ownership because a zone was absent from intake, has a familiar name, or has the same area. Preserve unowned zones and resolve name conflicts explicitly. Current fallback replaces owned zones using separate remove/create operations; inspect a partial failure before resuming.++## Optional conducting heatsinks and signal checks++Fields 0.4.0 supports specified rectangular conducting blocks, per-layer copper thickness, and a Signals view. Read its `docs/heatsinks-and-signals.md` before adding `heatsinks`, `copperUmByLayer`, or `signals` to the run spec. Model only real proposed assembly geometry with justified conductivity/contact and dielectric data. Never invent a heatsink or change the load to make a gate pass. Re-solve after spec changes so input hashes remain valid.++For high-speed nets, explicitly define capacitance or differential-pair checks with consistent stackup and reference copper. `adom-fields ui --port 8874 view --quantity signals` shows the results. Record unsupported cases and limitations; a screening estimate is not manufacturing or signal-integrity qualification. Native EDA model/text/zone primitives remain bridge-owned; pending bridge PRs are not deployed capabilities.