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Initial commit: component/adg902brmz

Ray ·81b8ebbd05 ·1mo ago
2 files changed +185
README.mdadded+44
@@ -0,0 +1,44 @@+# ADG902BRMZ++**Analog Devices** · RF Switches · MSOP-8++ADG902BRMZ from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Power Supply Input, operating range 1.65 V to 2.75 V, decouple VDD to GND. |+| 2 | CTRL | input | CMOS or LVTTL Logic Level Control Input, CTRL must not exceed VDD; Logic 0 isolates RF1 from RF2, Logic 1 connects RF1 to RF2. |+| 3 | GND | power_in | Ground Reference Point for All Circuitry on the Device. |+| 4 | RF1 | bidirectional | RF1 port for wideband RF signal switching, operational from DC to 4.5 GHz. |+| 5 | GND | power_in | Ground Reference Point for All Circuitry on the Device. |+| 6 | GND | power_in | Ground Reference Point for All Circuitry on the Device. |+| 7 | GND | power_in | Ground Reference Point for All Circuitry on the Device. |+| 8 | RF2 | bidirectional | RF2 port for wideband RF signal switching, operational from DC to 4.5 GHz. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Analog Devices |+| Package | MSOP-8 |+| Category | RF And Wireless |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `ADG902BRMZ`+- Footprint: `Package_SO:MSOP-8_3x3mm_P0.65mm`+- 3D model: MSOP-8 (KiCad packages3D, STEP)+- 3D model files: `adg902brmz-etched.step` / `adg902brmz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adg902brmz.step` / `adg902brmz.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893209845485568) (13 pp, sha256 `95ccb091e9514852`, retrieved 2026-09-21, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/adg902brmz-datasheet.pdf)
page.jsonadded+141
@@ -0,0 +1,141 @@+{+  "slug": "adg902brmz",+  "version": "0.1.0",+  "type": "component",+  "description": "Analog Devices RF Switches, MSOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "rf and wireless",+    "adg902brmz",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "adg902brmz.kicad_sym",+    "adg902brmz.kicad_mod",+    "adg902brmz.glb",+    "adg902brmz.step",+    "adg902brmz.lbr",+    "docs/hero.png",+    "docs/adg902brmz-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "ADG902BRMZ",+    "manufacturer": "Analog Devices",+    "package": "MSOP-8",+    "pin_count": 8,+    "category": "RF And Wireless",+    "subcategory": "RF Switches",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893209845485568",+    "parts": {+      "symbol": "adg902brmz.kicad_sym",+      "footprint": "adg902brmz.kicad_mod",+      "model_3d": "adg902brmz-etched.glb",+      "model_3d_plain": "adg902brmz.glb",+      "model_3d_step": "adg902brmz-etched.step",+      "model_3d_step_plain": "adg902brmz.step",+      "lbr": "adg902brmz.lbr"+    },+    "distributor_links": {+      "lcsc": "C207407"+    },+    "pins": [+      {+        "number": "1",+        "name": "VDD",+        "type": "power_in",+        "description": "Power Supply Input, operating range 1.65 V to 2.75 V, decouple VDD to GND."+      },+      {+        "number": "2",+        "name": "CTRL",+        "type": "input",+        "description": "CMOS or LVTTL Logic Level Control Input, CTRL must not exceed VDD; Logic 0 isolates RF1 from RF2, Logic 1 connects RF1 to RF2."+      },+      {+        "number": "3",+        "name": "GND",+        "type": "power_in",+        "description": "Ground Reference Point for All Circuitry on the Device."+      },+      {+        "number": "4",+        "name": "RF1",+        "type": "bidirectional",+        "description": "RF1 port for wideband RF signal switching, operational from DC to 4.5 GHz."+      },+      {+        "number": "5",+        "name": "GND",+        "type": "power_in",+        "description": "Ground Reference Point for All Circuitry on the Device."+      },+      {+        "number": "6",+        "name": "GND",+        "type": "power_in",+        "description": "Ground Reference Point for All Circuitry on the Device."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground Reference Point for All Circuitry on the Device."+      },+      {+        "number": "8",+        "name": "RF2",+        "type": "bidirectional",+        "description": "RF2 port for wideband RF signal switching, operational from DC to 4.5 GHz."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 13,+        "cost_usd": 0.1965,+        "at": "2026-09-21T15:23:26"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588893209845485568",+        "pages": 13,+        "sha256": "95ccb091e9514852",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file