← Commit history

Initial commit: component/adc122s655cimm

Ray ·d8ee031a2b ·11h ago
2 files changed +255
README.mdadded+46
@@ -0,0 +1,46 @@+# ADC122S655CIMM++**Texas Instruments** · Global Sourcing Parts · VSSOP-10-0.5mm++ADC122S655CIMM from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VREF | power_in | Voltage reference input that must be driven between 1V and VA, and decoupled to GND with a minimum 0.1 µF ceramic capacitor (1.0 µF to 10 µF bulk in parallel recommended). |+| 2 | CHA+ | input | Non-inverting analog input for Channel A, the positive side of the differential signal applied to Channel A. |+| 3 | CHA- | input | Inverting analog input for Channel A, the negative side of the differential signal applied to Channel A. |+| 4 | CHB- | input | Inverting analog input for Channel B, the negative side of the differential signal applied to Channel B. |+| 5 | CHB+ | input | Non-inverting analog input for Channel B, the positive side of the differential signal applied to Channel B. |+| 6 | GND | power_in | Ground reference point for all signals applied to the ADC122S655. |+| 7 | VA | power_in | Analog power supply input that must be held between 4.5V and 5.5V and decoupled to GND with a minimum 0.1 µF ceramic capacitor (1.0 µF to 10 µF bulk in parallel recommended). |+| 8 | DOUT | output | Serial data output for both channels, carrying 4 null bits, 12 bits of Channel A, 4 null bits and 12 bits of Channel B, updated on SCLK falling edges and valid on rising edges. |+| 9 | SCLK | input | Serial clock that controls data transfer and serves as the conversion clock, with a specified range of 6.4 MHz to 16 MHz. |+| 10 | CS | input | Active-low chip select: the device converts while CS is low, enters power-down while CS is high, and a conversion begins on the falling edge of CS. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VSSOP-10-0.5mm |+| Category | Global Sourcing Parts |+| Pins | 10 |++## CAD (KiCad official)++- Symbol: `ADC122S655CIMM`+- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`+- 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)+- 3D model files: `adc122s655cimm-etched.step` / `adc122s655cimm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `adc122s655cimm.step` / `adc122s655cimm.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/adc122s655) (29 pp, sha256 `fc23d6f6c33bbd16`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/adc122s655cimm-datasheet.pdf)
page.jsonadded+209
@@ -0,0 +1,209 @@+{+  "slug": "adc122s655cimm",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Global Sourcing Parts, VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "global sourcing parts",+    "adc122s655cimm",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "adc122s655cimm.kicad_sym",+    "adc122s655cimm.kicad_mod",+    "adc122s655cimm.glb",+    "adc122s655cimm.step",+    "adc122s655cimm.lbr",+    "docs/hero.png",+    "docs/adc122s655cimm-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "adc122s655cimm-hero.glb",+    "adc122s655cimm-hero.overlay.json"+  ],+  "component": {+    "mpn": "ADC122S655CIMM",+    "manufacturer": "Texas Instruments",+    "package": "VSSOP-10-0.5mm",+    "pin_count": 10,+    "category": "Global Sourcing Parts",+    "subcategory": "Global Sourcing Parts",+    "datasheet": "https://www.ti.com/cn/lit/gpn/adc122s655",+    "parts": {+      "symbol": "adc122s655cimm.kicad_sym",+      "footprint": "adc122s655cimm.kicad_mod",+      "model_3d": "adc122s655cimm-hero.glb",+      "model_3d_plain": "adc122s655cimm.glb",+      "model_3d_step": "adc122s655cimm-etched.step",+      "model_3d_step_plain": "adc122s655cimm.step",+      "lbr": "adc122s655cimm.lbr"+    },+    "distributor_links": {+      "lcsc": "C2669972"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T19:25:36Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": null,+        "status": "no match"+      },+      "mouser": {+        "pn": null,+        "status": "no match"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "VREF",+        "type": "power_in",+        "description": "Voltage reference input that must be driven between 1V and VA, and decoupled to GND with a minimum 0.1 µF ceramic capacitor (1.0 µF to 10 µF bulk in parallel recommended)."+      },+      {+        "number": "2",+        "name": "CHA+",+        "type": "input",+        "description": "Non-inverting analog input for Channel A, the positive side of the differential signal applied to Channel A."+      },+      {+        "number": "3",+        "name": "CHA-",+        "type": "input",+        "description": "Inverting analog input for Channel A, the negative side of the differential signal applied to Channel A."+      },+      {+        "number": "4",+        "name": "CHB-",+        "type": "input",+        "description": "Inverting analog input for Channel B, the negative side of the differential signal applied to Channel B."+      },+      {+        "number": "5",+        "name": "CHB+",+        "type": "input",+        "description": "Non-inverting analog input for Channel B, the positive side of the differential signal applied to Channel B."+      },+      {+        "number": "6",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference point for all signals applied to the ADC122S655."+      },+      {+        "number": "7",+        "name": "VA",+        "type": "power_in",+        "description": "Analog power supply input that must be held between 4.5V and 5.5V and decoupled to GND with a minimum 0.1 µF ceramic capacitor (1.0 µF to 10 µF bulk in parallel recommended)."+      },+      {+        "number": "8",+        "name": "DOUT",+        "type": "output",+        "description": "Serial data output for both channels, carrying 4 null bits, 12 bits of Channel A, 4 null bits and 12 bits of Channel B, updated on SCLK falling edges and valid on rising edges."+      },+      {+        "number": "9",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock that controls data transfer and serves as the conversion clock, with a specified range of 6.4 MHz to 16 MHz."+      },+      {+        "number": "10",+        "name": "CS",+        "type": "input",+        "description": "Active-low chip select: the device converts while CS is low, enters power-down while CS is high, and a conversion begins on the falling edge of CS."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Pin numbers and names are taken from the Pin Descriptions table on page 2. The connection diagram on"+        ],+        "pages_sent": 6,+        "cost_usd": 0.0452,+        "at": "2026-10-08T19:25:13"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/adc122s655",+        "pages": 29,+        "sha256": "fc23d6f6c33bbd16",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 10,+        "described": 10,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "adc122s655cimm.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          4.9,+          3,+          1.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "b8f88eac3ce221c2ccb0b5048f9ad49c2ef4af148f8ae50c4e232e357683f547",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "adc122s655cimm-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          4.9,+          3,+          1.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "39f924320c67fd617b94be897b64d11897761ae507db2356918fcdb68fe3a638",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file