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ad9833brmz: factory component page (tier=lcsc)

Ray ·d4ed0c78e0 ·28d ago ·parent 79d905e
1 file changed +146−8
page.json+146−8
@@ -1,13 +1,156 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "ad9833brmz",+  "title": "AD9833BRMZ",+  "brief": "Analog Devices Direct Digital Synthesis (DDS), MSOP-10. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Analog Devices Direct Digital Synthesis (DDS), MSOP-10. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "data acquisition",     "ad9833brmz"   ],+  "component": {+    "mpn": "AD9833BRMZ",+    "manufacturer": "Analog Devices",+    "package": "MSOP-10",+    "pin_count": 10,+    "category": "Data Acquisition",+    "subcategory": "Direct Digital Synthesis (DDS)",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588927806441476096",+    "parts": {+      "symbol": "ad9833brmz.kicad_sym",+      "footprint": "ad9833brmz.kicad_mod",+      "model_3d": "ad9833brmz.glb",+      "model_3d_step": "ad9833brmz.step",+      "lbr": "ad9833brmz.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "COMP",+        "type": "passive",+        "description": "DAC Bias Pin. Used for decoupling the DAC bias voltage; typically decoupled with a 10 nF capacitor to VDD."+      },+      {+        "number": "2",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive Power Supply for the analog and digital interface sections (2.3 V to 5.5 V). Also supplies the on-board 2.5 V regulator. Should be decoupled with 0.1 \u00b5F and 10 \u00b5F capacitors to AGND."+      },+      {+        "number": "3",+        "name": "CAP/2.5V",+        "type": "passive",+        "description": "Regulator output/bypass. The digital circuitry operates from 2.5 V generated by an on-board regulator from VDD (when VDD > 2.7 V). Requires a ~100 nF decoupling capacitor from CAP/2.5V to DGND. If VDD \u2264 2.7 V, tie CAP/2.5V directly to VDD."+      },+      {+        "number": "4",+        "name": "DGND",+        "type": "power_in",+        "description": "Digital Ground return."+      },+      {+        "number": "5",+        "name": "MCLK",+        "type": "input",+        "description": "Digital Clock Input. DDS output frequencies are expressed as a binary fraction of MCLK; determines output frequency accuracy and phase noise. Max 25 MHz (t1 \u2265 40 ns period)."+      },+      {+        "number": "6",+        "name": "SDATA",+        "type": "input",+        "description": "Serial Data Input. 16-bit serial data-word applied to this input; clocked in on falling edge of SCLK."+      },+      {+        "number": "7",+        "name": "SCLK",+        "type": "input",+        "description": "Serial Clock Input. Data is clocked into the AD9833 on each falling edge of SCLK. Rates up to 40 MHz."+      },+      {+        "number": "8",+        "name": "FSYNC",+        "type": "input",+        "description": "Active Low Control Input (frame sync). When FSYNC is taken low, the internal logic is informed that a new 16-bit word is being loaded into the device."+      },+      {+        "number": "9",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog Ground return."+      },+      {+        "number": "10",+        "name": "VOUT",+        "type": "output",+        "description": "Voltage Output. Analog and digital output of the AD9833 (sine, triangle, or square wave). An external load resistor is not required because the device has an on-board 200 \u03a9 resistor. VOUT max ~0.65 V, min ~38 mV."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588927806441476096",+        "pages": 21,+        "sha256": "426eb7a26ea9dc0d",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 10,+        "described": 10,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Analog Devices",+      "Package": "MSOP-10",+      "Category": "Data Acquisition",+      "Pins": "10"+    }+  },+  "variants": [+    {+      "mpn": "AD9833BRMZ",+      "kind": "packaging"+    },+    {+      "mpn": "AD9833BRMZ-REEL",+      "kind": "packaging"+    },+    {+      "mpn": "AD9833BRMZWBRMZ",+      "kind": "packaging"+    },+    {+      "mpn": "AD9833BRMZWBRMZ-REEL",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "ad9833brmz"+  ],+  "discovery_pitch": "AD9833BRMZ (Analog Devices) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +168,5 @@     "docs/ad9833brmz-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file