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Set visibility: public

Ray ·ba66fc4096 ·28d ago ·parent 1149b94
1 file changed +8−5
page.json+8−5
@@ -38,13 +38,13 @@         "number": "2",         "name": "VDD",         "type": "power_in",-        "description": "Positive Power Supply for the analog and digital interface sections (2.3 V to 5.5 V). Also supplies the on-board 2.5 V regulator. Should be decoupled with 0.1 \u00b5F and 10 \u00b5F capacitors to AGND."+        "description": "Positive Power Supply for the analog and digital interface sections (2.3 V to 5.5 V). Also supplies the on-board 2.5 V regulator. Should be decoupled with 0.1 µF and 10 µF capacitors to AGND."       },       {         "number": "3",         "name": "CAP/2.5V",         "type": "passive",-        "description": "Regulator output/bypass. The digital circuitry operates from 2.5 V generated by an on-board regulator from VDD (when VDD > 2.7 V). Requires a ~100 nF decoupling capacitor from CAP/2.5V to DGND. If VDD \u2264 2.7 V, tie CAP/2.5V directly to VDD."+        "description": "Regulator output/bypass. The digital circuitry operates from 2.5 V generated by an on-board regulator from VDD (when VDD > 2.7 V). Requires a ~100 nF decoupling capacitor from CAP/2.5V to DGND. If VDD ≤ 2.7 V, tie CAP/2.5V directly to VDD."       },       {         "number": "4",@@ -56,7 +56,7 @@         "number": "5",         "name": "MCLK",         "type": "input",-        "description": "Digital Clock Input. DDS output frequencies are expressed as a binary fraction of MCLK; determines output frequency accuracy and phase noise. Max 25 MHz (t1 \u2265 40 ns period)."+        "description": "Digital Clock Input. DDS output frequencies are expressed as a binary fraction of MCLK; determines output frequency accuracy and phase noise. Max 25 MHz (t1 ≥ 40 ns period)."       },       {         "number": "6",@@ -86,7 +86,7 @@         "number": "10",         "name": "VOUT",         "type": "output",-        "description": "Voltage Output. Analog and digital output of the AD9833 (sine, triangle, or square wave). An external load resistor is not required because the device has an on-board 200 \u03a9 resistor. VOUT max ~0.65 V, min ~38 mV."+        "description": "Voltage Output. Analog and digital output of the AD9833 (sine, triangle, or square wave). An external load resistor is not required because the device has an on-board 200 Ω resistor. VOUT max ~0.65 V, min ~38 mV."       }     ],     "provenance": {@@ -168,5 +168,8 @@     "docs/ad9833brmz-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file