component
AD9753ASTZRL
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DAC), LQFP-48(7x7). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+13−10@@ -56,13 +56,13 @@ "number": "5", "name": "DVDD", "type": "power_in",- "description": "Digital supply voltage, 3.0-3.6 V (3.3 V nom). Digital supply current I_DVDD \u2248 3.5 mA typ."+ "description": "Digital supply voltage, 3.0-3.6 V (3.3 V nom). Digital supply current I_DVDD ≈ 3.5 mA typ." }, { "number": "6", "name": "PLLLOCK", "type": "output",- "description": "Phase-locked loop lock indicator output. CMOS output; V_OH \u2265 3.0 V, V_OL \u2264 0.3 V."+ "description": "Phase-locked loop lock indicator output. CMOS output; V_OH ≥ 3.0 V, V_OL ≤ 0.3 V." }, { "number": "7",@@ -260,31 +260,31 @@ "number": "39", "name": "REFIO", "type": "bidirectional",- "description": "Reference input/output. Sources the 1.20 V internal band-gap reference (1.14-1.26 V, ~100 nA drive) or accepts an external reference (0.1-1.25 V, R_in \u2248 1 M\u03a9). Bypass with 0.1 \u00b5F to ACOM when using internal reference."+ "description": "Reference input/output. Sources the 1.20 V internal band-gap reference (1.14-1.26 V, ~100 nA drive) or accepts an external reference (0.1-1.25 V, R_in ≈ 1 MΩ). Bypass with 0.1 µF to ACOM when using internal reference." }, { "number": "40", "name": "FSADJ", "type": "passive",- "description": "Full-scale output current adjust. Connect R_SET (typ. 2 k\u03a9) to ACOM; I_OUTFS = 32 \u00d7 I_REF, giving 2-20 mA full-scale."+ "description": "Full-scale output current adjust. Connect R_SET (typ. 2 kΩ) to ACOM; I_OUTFS = 32 × I_REF, giving 2-20 mA full-scale." }, { "number": "41", "name": "AVDD", "type": "power_in",- "description": "Analog supply voltage, 3.0-3.6 V (3.3 V nom). Analog supply current I_AVDD \u2248 33 mA typ."+ "description": "Analog supply voltage, 3.0-3.6 V (3.3 V nom). Analog supply current I_AVDD ≈ 33 mA typ." }, { "number": "42", "name": "IOUTB", "type": "output",- "description": "Complementary differential DAC current output. Full-scale 2-20 mA; output compliance \u22121.0 V to +1.25 V; output resistance \u2248100 k\u03a9, C \u2248 5 pF."+ "description": "Complementary differential DAC current output. Full-scale 2-20 mA; output compliance −1.0 V to +1.25 V; output resistance ≈100 kΩ, C ≈ 5 pF." }, { "number": "43", "name": "IOUTA", "type": "output",- "description": "Differential DAC current output. Full-scale 2-20 mA; output compliance \u22121.0 V to +1.25 V."+ "description": "Differential DAC current output. Full-scale 2-20 mA; output compliance −1.0 V to +1.25 V." }, { "number": "44",@@ -308,13 +308,13 @@ "number": "47", "name": "PLLVDD", "type": "power_in",- "description": "PLL supply voltage, 3.0-3.6 V. Tie to CLKCOM/PLLCOM ground to disable the internal PLL. I_PLLVDD \u2248 4.5 mA typ."+ "description": "PLL supply voltage, 3.0-3.6 V. Tie to CLKCOM/PLLCOM ground to disable the internal PLL. I_PLLVDD ≈ 4.5 mA typ." }, { "number": "48", "name": "CLKVDD", "type": "power_in",- "description": "Clock supply voltage, 3.0-3.6 V. Powers the clock receiver. I_CLKVDD \u2248 10 mA typ."+ "description": "Clock supply voltage, 3.0-3.6 V. Powers the clock receiver. I_CLKVDD ≈ 10 mA typ." } ], "provenance": {@@ -388,5 +388,8 @@ "docs/ad9753astzrl-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }