component
AD9518-3ABCPZ-RL7
Public Made by Adomby adom
Analog Devices Clock Generators, PLLs, Frequency Synthesizers, LFCSP-48(7x7). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+368−8@@ -1,13 +1,378 @@ {+ "schema_version": 1,+ "type": "component", "slug": "ad9518-3abcpz-rl7",+ "title": "AD9518-3ABCPZ-RL7",+ "brief": "Analog Devices Clock Generators, PLLs, Frequency Synthesizers, LFCSP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Analog Devices Clock Generators, PLLs, Frequency Synthesizers, LFCSP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "clock-timing", "ad9518-3abcpz-rl7" ],+ "component": {+ "mpn": "AD9518-3ABCPZ-RL7",+ "manufacturer": "Analog Devices",+ "package": "LFCSP-48(7x7)",+ "pin_count": 49,+ "category": "Clock/Timing",+ "subcategory": "Clock Generators, PLLs, Frequency Synthesizers",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589800267123494912",+ "parts": {+ "symbol": "ad9518-3abcpz-rl7.kicad_sym",+ "footprint": "ad9518-3abcpz-rl7.kicad_mod",+ "model_3d": "ad9518-3abcpz-rl7.glb",+ "model_3d_step": "ad9518-3abcpz-rl7.step",+ "lbr": "ad9518-3abcpz-rl7.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "REFMON",+ "type": "output",+ "description": "Reference Monitor Output (3.3 V CMOS). Multiplexed status/monitor output configurable via register 0x01B."+ },+ {+ "number": "2",+ "name": "LD",+ "type": "output",+ "description": "Lock Detect Output (3.3 V CMOS). Multiplexed selectable output configured via register 0x01A."+ },+ {+ "number": "3",+ "name": "VCP",+ "type": "power_in",+ "description": "Charge Pump Power Supply. V_S \u2264 V_CP \u2264 5.0 V; typically 3.3 V, but must be 5 V when a 5 V external VCXO is used."+ },+ {+ "number": "4",+ "name": "CP",+ "type": "output",+ "description": "Charge Pump Output. Connects to the external PLL loop filter; nominal I_CP = 4.8 mA with CPRSET = 5.1 k\u03a9."+ },+ {+ "number": "5",+ "name": "STATUS",+ "type": "output",+ "description": "Status Output (3.3 V CMOS). Multiplexed selectable output configured via register 0x017."+ },+ {+ "number": "6",+ "name": "REF_SEL",+ "type": "input",+ "description": "Reference Select (3.3 V CMOS). Selects REF1 (low) or REF2 (high). Internal 30 k\u03a9 pull-down."+ },+ {+ "number": "7",+ "name": "SYNC",+ "type": "input",+ "description": "Manual Synchronization / Manual Holdover (3.3 V CMOS, active low). Initiates manual sync/holdover. Internal 30 k\u03a9 pull-up."+ },+ {+ "number": "8",+ "name": "LF",+ "type": "passive",+ "description": "Loop Filter Input. Connects to the internal VCO control voltage node."+ },+ {+ "number": "9",+ "name": "BYPASS",+ "type": "passive",+ "description": "Internal LDO Bypass. Connect a 220 nF capacitor to ground for LDO stability. Contains ~31 pF of internal capacitance which may influence loop filter design at large loop bandwidths."+ },+ {+ "number": "10",+ "name": "VS",+ "type": "power_in",+ "description": "3.3 V Power Supply Pin (V_S = 3.135 V to 3.465 V)."+ },+ {+ "number": "11",+ "name": "CLK",+ "type": "input",+ "description": "Self-biased differential clock input (positive) for the clock distribution section. May be left floating if the internal VCO is used."+ },+ {+ "number": "12",+ "name": "CLK_N",+ "type": "input",+ "description": "Self-biased differential clock input (negative, CLK-bar). May be left floating if the internal VCO is used."+ },+ {+ "number": "13",+ "name": "SCLK",+ "type": "input",+ "description": "Serial Control Port Data Clock (3.3 V CMOS)."+ },+ {+ "number": "14",+ "name": "CS",+ "type": "input",+ "description": "Serial Control Port Chip Select (3.3 V CMOS, active low). Internal 30 k\u03a9 pull-up."+ },+ {+ "number": "15",+ "name": "SDO",+ "type": "output",+ "description": "Serial Control Port unidirectional serial data output (3.3 V CMOS)."+ },+ {+ "number": "16",+ "name": "SDIO",+ "type": "bidirectional",+ "description": "Serial Control Port bidirectional serial data input/output (3.3 V CMOS)."+ },+ {+ "number": "17",+ "name": "RESET",+ "type": "input",+ "description": "Chip Reset (3.3 V CMOS, active low). Internal 30 k\u03a9 pull-up."+ },+ {+ "number": "18",+ "name": "PD",+ "type": "input",+ "description": "Chip Power Down (3.3 V CMOS, active low). Internal 30 k\u03a9 pull-up."+ },+ {+ "number": "19",+ "name": "OUT4",+ "type": "output",+ "description": "LVPECL Output (positive) - one side of the differential OUT4 pair."+ },+ {+ "number": "20",+ "name": "OUT4_N",+ "type": "output",+ "description": "LVPECL Output (negative, OUT4-bar) - one side of the differential OUT4 pair."+ },+ {+ "number": "21",+ "name": "VS_LVPECL",+ "type": "power_in",+ "description": "Extended-voltage LVPECL power supply pin (2.5 V to 3.3 V nominal)."+ },+ {+ "number": "22",+ "name": "OUT5",+ "type": "output",+ "description": "LVPECL Output (positive) - one side of the differential OUT5 pair."+ },+ {+ "number": "23",+ "name": "OUT5_N",+ "type": "output",+ "description": "LVPECL Output (negative, OUT5-bar) - one side of the differential OUT5 pair."+ },+ {+ "number": "24",+ "name": "VS",+ "type": "power_in",+ "description": "3.3 V Power Supply Pin."+ },+ {+ "number": "25",+ "name": "VS",+ "type": "power_in",+ "description": "3.3 V Power Supply Pin."+ },+ {+ "number": "26",+ "name": "VS",+ "type": "power_in",+ "description": "3.3 V Power Supply Pin."+ },+ {+ "number": "27",+ "name": "GND",+ "type": "power_in",+ "description": "Ground. Also see the EPAD description."+ },+ {+ "number": "28",+ "name": "OUT3_N",+ "type": "output",+ "description": "LVPECL Output (negative, OUT3-bar) - one side of the differential OUT3 pair."+ },+ {+ "number": "29",+ "name": "OUT3",+ "type": "output",+ "description": "LVPECL Output (positive) - one side of the differential OUT3 pair."+ },+ {+ "number": "30",+ "name": "VS_LVPECL",+ "type": "power_in",+ "description": "Extended-voltage LVPECL power supply pin (2.5 V to 3.3 V nominal)."+ },+ {+ "number": "31",+ "name": "VS_LVPECL",+ "type": "power_in",+ "description": "Extended-voltage LVPECL power supply pin (2.5 V to 3.3 V nominal)."+ },+ {+ "number": "32",+ "name": "OUT2_N",+ "type": "output",+ "description": "LVPECL Output (negative, OUT2-bar) - one side of the differential OUT2 pair."+ },+ {+ "number": "33",+ "name": "OUT2",+ "type": "output",+ "description": "LVPECL Output (positive) - one side of the differential OUT2 pair."+ },+ {+ "number": "34",+ "name": "GND",+ "type": "power_in",+ "description": "Ground. Also see the EPAD description."+ },+ {+ "number": "35",+ "name": "VS",+ "type": "power_in",+ "description": "3.3 V Power Supply Pin."+ },+ {+ "number": "36",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect. Leave floating."+ },+ {+ "number": "37",+ "name": "VS",+ "type": "power_in",+ "description": "3.3 V Power Supply Pin."+ },+ {+ "number": "38",+ "name": "OUT1_N",+ "type": "output",+ "description": "LVPECL Output (negative, OUT1-bar) - one side of the differential OUT1 pair."+ },+ {+ "number": "39",+ "name": "OUT1",+ "type": "output",+ "description": "LVPECL Output (positive) - one side of the differential OUT1 pair."+ },+ {+ "number": "40",+ "name": "VS_LVPECL",+ "type": "power_in",+ "description": "Extended-voltage LVPECL power supply pin (2.5 V to 3.3 V nominal)."+ },+ {+ "number": "41",+ "name": "OUT0_N",+ "type": "output",+ "description": "LVPECL Output (negative, OUT0-bar) - one side of the differential OUT0 pair."+ },+ {+ "number": "42",+ "name": "OUT0",+ "type": "output",+ "description": "LVPECL Output (positive) - one side of the differential OUT0 pair."+ },+ {+ "number": "43",+ "name": "VS",+ "type": "power_in",+ "description": "3.3 V Power Supply Pin."+ },+ {+ "number": "44",+ "name": "RSET",+ "type": "passive",+ "description": "Bias current setting resistor. Connect a 4.12 k\u03a9 resistor to ground to set the internal bias currents."+ },+ {+ "number": "45",+ "name": "VS",+ "type": "power_in",+ "description": "3.3 V Power Supply Pin."+ },+ {+ "number": "46",+ "name": "CPRSET",+ "type": "passive",+ "description": "Charge pump current-set resistor. Connect a 5.1 k\u03a9 resistor (range 2.7 to 10 k\u03a9) to ground to set the CP current range (I_CP = 3.06/CPRSET)."+ },+ {+ "number": "47",+ "name": "REFIN_N",+ "type": "input",+ "description": "Self-biased differential input for the PLL reference (negative, REFIN-bar). Alternatively serves as a single-ended CMOS input for REF2."+ },+ {+ "number": "48",+ "name": "REFIN",+ "type": "input",+ "description": "Self-biased differential input for the PLL reference (positive, REFIN/REF1). Alternatively serves as a single-ended CMOS input for REF1."+ },+ {+ "number": "EPAD",+ "name": "GND",+ "type": "power_in",+ "description": "Exposed thermal pad on the bottom of the package. Must be connected to ground for proper electrical and thermal operation."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589800267123494912",+ "pages": 64,+ "sha256": "ad1d5d3ef813be27",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Analog Devices",+ "Package": "LFCSP-48(7x7)",+ "Category": "Clock/Timing",+ "Pins": "49"+ }+ },+ "variants": [+ {+ "mpn": "AD9518-3ABCPZ-RL7",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "ad9518-3abcpz-rl7"+ ],+ "discovery_pitch": "AD9518-3ABCPZ-RL7 (Analog Devices) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +390,5 @@ "docs/ad9518-3abcpz-rl7-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }