AD8002B

@@ -62,6 +62,18 @@   <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-2.6000" y="2.4700"/>+    <vertex x="-2.8400" y="2.8000"/>+    <vertex x="-2.3600" y="2.8000"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.9750" y="2.4500"/>+    <vertex x="1.9500" y="2.4500"/>+    <vertex x="1.9500" y="-2.4500"/>+    <vertex x="-1.9500" y="-2.4500"/>+    <vertex x="-1.9500" y="1.4750"/>+  </polygon>   <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>@@ -70,7 +82,7 @@   <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/>   <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package>+</package> </packages> <symbols> <symbol name="AD8002B">@@ -108,7 +120,13 @@         <connect gate="G$1" pin="VDD" pad="6"/>         <connect gate="G$1" pin="VO1" pad="5"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="AD8002B" constant="no"/>+          <attribute name="MANUFACTURER" value="IDCHIP" constant="no"/>+          <attribute name="LCSC_PN" value="C437153" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>

@@ -26,19 +26,21 @@       "model_3d_step": "ad8002b.step",       "lbr": "ad8002b.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "lcsc": "C437153"+    },     "pins": [       {         "number": "1",         "name": "SD",         "type": "input",-        "description": "Shutdown control input. Logic HIGH puts the chip into low-power shutdown (typ. 25µA); logic LOW enables normal operation. At 5V supply the shutdown threshold is ~1.6V and enable threshold is ~1.2V. Has an internal pull-up."+        "description": "Shutdown control input. Logic HIGH puts the chip into low-power shutdown (typ. 25\u00b5A); logic LOW enables normal operation. At 5V supply the shutdown threshold is ~1.6V and enable threshold is ~1.2V. Has an internal pull-up."       },       {         "number": "2",         "name": "BYP",         "type": "passive",-        "description": "Bypass pin for the internal VDD/2 mid-supply reference. Connect a 1µF capacitor from BYP to GND to filter the internal common-mode reference voltage and reduce power-supply noise coupling into the amplifier."+        "description": "Bypass pin for the internal VDD/2 mid-supply reference. Connect a 1\u00b5F capacitor from BYP to GND to filter the internal common-mode reference voltage and reduce power-supply noise coupling into the amplifier."       },       {         "number": "3",@@ -50,19 +52,19 @@         "number": "4",         "name": "-IN",         "type": "input",-        "description": "Inverting analog audio input. Audio source is AC-coupled here (typ. 0.22µF) through a series input resistor (typ. 22kΩ); a feedback resistor (typ. 68kΩ) from VO1 sets the closed-loop gain (Av = -Rf/Rin)."+        "description": "Inverting analog audio input. Audio source is AC-coupled here (typ. 0.22\u00b5F) through a series input resistor (typ. 22k\u03a9); a feedback resistor (typ. 68k\u03a9) from VO1 sets the closed-loop gain (Av = -Rf/Rin)."       },       {         "number": "5",         "name": "VO1",         "type": "output",-        "description": "BTL audio output 1 (VO-). One side of the bridge-tied speaker load; connects directly to one speaker terminal with no output coupling capacitor required. Drives up to 3W into a 4Ω load (BTL) at 5V."+        "description": "BTL audio output 1 (VO-). One side of the bridge-tied speaker load; connects directly to one speaker terminal with no output coupling capacitor required. Drives up to 3W into a 4\u03a9 load (BTL) at 5V."       },       {         "number": "6",         "name": "VDD",         "type": "power_in",-        "description": "Positive supply voltage input. Operating range 2V to 6.5V; typical 5V. Decouple with a 1µF (or larger) ceramic capacitor to GND close to the pin."+        "description": "Positive supply voltage input. Operating range 2V to 6.5V; typical 5V. Decouple with a 1\u00b5F (or larger) ceramic capacitor to GND close to the pin."       },       {         "number": "7",@@ -74,7 +76,7 @@         "number": "8",         "name": "VO2",         "type": "output",-        "description": "BTL audio output 2 (VO+). The complementary side of the bridge-tied speaker load; drives the other speaker terminal 180° out of phase with VO1. No output DC-blocking capacitor required."+        "description": "BTL audio output 2 (VO+). The complementary side of the bridge-tied speaker load; drives the other speaker terminal 180\u00b0 out of phase with VO1. No output DC-blocking capacitor required."       }     ],     "provenance": {