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pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)

Ray ·c181c544fc ·1mo ago ·parent b8a5421
2 files changed +267−1
package.json+2−1
@@ -24,6 +24,7 @@     "docs/hero.png",     "docs/ad8002b-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ] }\ No newline at end of file
pads.jsonadded+265
@@ -0,0 +1,265 @@+{+ "schema": "adom.pads/1",+ "slug": "ad8002b",+ "footprint": "SOIC-8_3.9x4.9mm_P1.27mm",+ "generated_from": {+  "footprint": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",+  "pins": "page.json:component.pins",+  "overrides": null+ },+ "pin1": {+  "pad": "1",+  "at": [+   -2.475,+   -1.905+  ],+  "corner": "top-left",+  "source": "silk-marker",+  "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4"+ },+ "pad_count": 8,+ "paste_apertures": 0,+ "issues": [],+ "pads": [+  {+   "pad": "1",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "1",+   "name": "SD",+   "type": "input",+   "description": "Shutdown control input. Logic HIGH puts the chip into low-power shutdown (typ. 25µA); logic LOW enables normal operation. At 5V supply the shutdown threshold is ~1.6V and enable threshold is ~1.2V. Has an internal pull-up.",+   "is_pin1": true,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "2",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "2",+   "name": "BYP",+   "type": "passive",+   "description": "Bypass pin for the internal VDD/2 mid-supply reference. Connect a 1µF capacitor from BYP to GND to filter the internal common-mode reference voltage and reduce power-supply noise coupling into the amplifier.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "3",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "3",+   "name": "+IN",+   "type": "input",+   "description": "Non-inverting analog audio input to the internal op-amp. Typically AC-coupled to signal ground through an input capacitor in single-ended input applications.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "4",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "4",+   "name": "-IN",+   "type": "input",+   "description": "Inverting analog audio input. Audio source is AC-coupled here (typ. 0.22µF) through a series input resistor (typ. 22kΩ); a feedback resistor (typ. 68kΩ) from VO1 sets the closed-loop gain (Av = -Rf/Rin).",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "5",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "5",+   "name": "VO1",+   "type": "output",+   "description": "BTL audio output 1 (VO-). One side of the bridge-tied speaker load; connects directly to one speaker terminal with no output coupling capacitor required. Drives up to 3W into a 4Ω load (BTL) at 5V.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "6",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "6",+   "name": "VDD",+   "type": "power_in",+   "description": "Positive supply voltage input. Operating range 2V to 6.5V; typical 5V. Decouple with a 1µF (or larger) ceramic capacitor to GND close to the pin.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "7",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "7",+   "name": "GND",+   "type": "power_in",+   "description": "Device ground / power return. Connect to the system analog ground plane.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "8",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "8",+   "name": "VO2",+   "type": "output",+   "description": "BTL audio output 2 (VO+). The complementary side of the bridge-tied speaker load; drives the other speaker terminal 180° out of phase with VO1. No output DC-blocking capacitor required.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  }+ ]+}\ No newline at end of file