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Initial commit: component/ad7799bruz-reel

Ray ·308623f650 ·1mo ago
2 files changed +241
README.mdadded+52
@@ -0,0 +1,52 @@+# AD7799BRUZ-REEL++**Analog Devices** · Analog To Digital Converters (ADC) · TSSOP-16++AD7799BRUZ-REEL from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SCLK | input | Serial clock input with Schmitt-triggered input for data transfers to and from the ADC; supports continuous or noncontinuous clock pulses. |+| 2 | CS | input | Active low chip select input for device selection in multi-device systems or as frame synchronization signal; can be hardwired low for 3-wire mode. |+| 3 | AIN3(+)/P1 | bidirectional | Positive terminal of differential analog input pair AIN3(+)/AIN3(−) or general-purpose digital output bit referenced between AVDD and GND, selectable via IO register. |+| 4 | AIN3(−)/P2 | bidirectional | Negative terminal of differential analog input pair AIN3(+)/AIN3(−) or general-purpose digital output bit referenced between AVDD and GND, selectable via IO register. |+| 5 | AIN1(+) | input | Positive terminal of differential analog input pair AIN1(+)/AIN1(−) with absolute voltage range GND − 30 mV to AVDD + 30 mV in unbuffered mode. |+| 6 | AIN1(−) | input | Negative terminal of differential analog input pair AIN1(+)/AIN1(−) with absolute voltage range GND − 30 mV to AVDD + 30 mV in unbuffered mode. |+| 7 | AIN2(+) | input | Positive terminal of differential analog input pair AIN2(+)/AIN2(−) for measurement of wide dynamic range low frequency signals. |+| 8 | AIN2(−) | input | Negative terminal of differential analog input pair AIN2(+)/AIN2(−) for measurement of wide dynamic range low frequency signals. |+| 9 | REFIN(+) | input | Positive reference input with nominal voltage 2.5 V and supported range 0.1 V to AVDD for external reference voltage source. |+| 10 | REFIN(−) | input | Negative reference input with voltage range between GND and AVDD − 0.1 V for external reference voltage source. |+| 11 | PSW | output | Low-side power switch to GND with on-resistance 7 Ω at AVDD = 5 V and maximum continuous current 30 mA for controlling external transducer power. |+| 12 | GND | power_in | Ground reference point at 0 V providing return path for all analog and digital currents. |+| 13 | AVDD | power_in | Analog supply voltage with operating range 2.7 V to 5.25 V for powering analog circuitry and reference detection. |+| 14 | DVDD | power_in | Digital interface supply voltage with operating range 2.7 V to 5.25 V, independent of AVDD for logic level interfacing. |+| 15 | DOUT/RDY | tri_state | Serial data output and conversion complete indicator pin; goes low when conversion is complete and valid on SCLK falling edge, with floating-state leakage current ±10 µA max. |+| 16 | DIN | input | Serial data input to input shift register with Schmitt-triggered input for writing data to control registers; data transferred to registers on SCLK falling edge. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Analog Devices |+| Package | TSSOP-16 |+| Category | Data Acquisition |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `AD7799BRUZ-REEL`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `ad7799bruz-reel-etched.step` / `ad7799bruz-reel-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad7799bruz-reel.step` / `ad7799bruz-reel.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881457955131392) (28 pp, sha256 `8dc502708fc65462`, retrieved 2026-09-18, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ad7799bruz-reel-datasheet.pdf)
page.jsonadded+189
@@ -0,0 +1,189 @@+{+  "slug": "ad7799bruz-reel",+  "version": "0.1.0",+  "type": "component",+  "description": "Analog Devices Analog To Digital Converters (ADC), TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "data acquisition",+    "ad7799bruz-reel",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ad7799bruz-reel.kicad_sym",+    "ad7799bruz-reel.kicad_mod",+    "ad7799bruz-reel.glb",+    "ad7799bruz-reel.step",+    "ad7799bruz-reel.lbr",+    "docs/hero.png",+    "docs/ad7799bruz-reel-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "AD7799BRUZ-REEL",+    "manufacturer": "Analog Devices",+    "package": "TSSOP-16",+    "pin_count": 16,+    "category": "Data Acquisition",+    "subcategory": "Analog To Digital Converters (ADC)",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881457955131392",+    "parts": {+      "symbol": "ad7799bruz-reel.kicad_sym",+      "footprint": "ad7799bruz-reel.kicad_mod",+      "model_3d": "ad7799bruz-reel-etched.glb",+      "model_3d_plain": "ad7799bruz-reel.glb",+      "model_3d_step": "ad7799bruz-reel-etched.step",+      "model_3d_step_plain": "ad7799bruz-reel.step",+      "lbr": "ad7799bruz-reel.lbr"+    },+    "distributor_links": {+      "lcsc": "C9670"+    },+    "pins": [+      {+        "number": "1",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock input with Schmitt-triggered input for data transfers to and from the ADC; supports continuous or noncontinuous clock pulses."+      },+      {+        "number": "2",+        "name": "CS",+        "type": "input",+        "description": "Active low chip select input for device selection in multi-device systems or as frame synchronization signal; can be hardwired low for 3-wire mode."+      },+      {+        "number": "3",+        "name": "AIN3(+)/P1",+        "type": "bidirectional",+        "description": "Positive terminal of differential analog input pair AIN3(+)/AIN3(−) or general-purpose digital output bit referenced between AVDD and GND, selectable via IO register."+      },+      {+        "number": "4",+        "name": "AIN3(−)/P2",+        "type": "bidirectional",+        "description": "Negative terminal of differential analog input pair AIN3(+)/AIN3(−) or general-purpose digital output bit referenced between AVDD and GND, selectable via IO register."+      },+      {+        "number": "5",+        "name": "AIN1(+)",+        "type": "input",+        "description": "Positive terminal of differential analog input pair AIN1(+)/AIN1(−) with absolute voltage range GND − 30 mV to AVDD + 30 mV in unbuffered mode."+      },+      {+        "number": "6",+        "name": "AIN1(−)",+        "type": "input",+        "description": "Negative terminal of differential analog input pair AIN1(+)/AIN1(−) with absolute voltage range GND − 30 mV to AVDD + 30 mV in unbuffered mode."+      },+      {+        "number": "7",+        "name": "AIN2(+)",+        "type": "input",+        "description": "Positive terminal of differential analog input pair AIN2(+)/AIN2(−) for measurement of wide dynamic range low frequency signals."+      },+      {+        "number": "8",+        "name": "AIN2(−)",+        "type": "input",+        "description": "Negative terminal of differential analog input pair AIN2(+)/AIN2(−) for measurement of wide dynamic range low frequency signals."+      },+      {+        "number": "9",+        "name": "REFIN(+)",+        "type": "input",+        "description": "Positive reference input with nominal voltage 2.5 V and supported range 0.1 V to AVDD for external reference voltage source."+      },+      {+        "number": "10",+        "name": "REFIN(−)",+        "type": "input",+        "description": "Negative reference input with voltage range between GND and AVDD − 0.1 V for external reference voltage source."+      },+      {+        "number": "11",+        "name": "PSW",+        "type": "output",+        "description": "Low-side power switch to GND with on-resistance 7 Ω at AVDD = 5 V and maximum continuous current 30 mA for controlling external transducer power."+      },+      {+        "number": "12",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference point at 0 V providing return path for all analog and digital currents."+      },+      {+        "number": "13",+        "name": "AVDD",+        "type": "power_in",+        "description": "Analog supply voltage with operating range 2.7 V to 5.25 V for powering analog circuitry and reference detection."+      },+      {+        "number": "14",+        "name": "DVDD",+        "type": "power_in",+        "description": "Digital interface supply voltage with operating range 2.7 V to 5.25 V, independent of AVDD for logic level interfacing."+      },+      {+        "number": "15",+        "name": "DOUT/RDY",+        "type": "tri_state",+        "description": "Serial data output and conversion complete indicator pin; goes low when conversion is complete and valid on SCLK falling edge, with floating-state leakage current ±10 µA max."+      },+      {+        "number": "16",+        "name": "DIN",+        "type": "input",+        "description": "Serial data input to input shift register with Schmitt-triggered input for writing data to control registers; data transferred to registers on SCLK falling edge."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 28,+        "cost_usd": 0.3288,+        "at": "2026-09-18T05:25:28"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588881457955131392",+        "pages": 28,+        "sha256": "8dc502708fc65462",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file