component
AD7192BRUZ-REEL
Public Made by Adomby adom
Analog Devices Analog To Digital Converters (ADC), TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+61@@ -0,0 +1,61 @@+# AD7192BRUZ-REEL++**Analog Devices** · Analog To Digital Converters (ADC) · TSSOP-24++AD7192BRUZ-REEL from Analog Devices, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | MCLK1 | input | External master clock input used as crystal oscillator feedback when external crystal connected between MCLK1 and MCLK2. |+| 2 | MCLK2 | tri_state | Tri-state master clock pin supporting external crystal drive, external clock input, internal 4.92MHz clock output, or tri-state when not used. |+| 3 | SCLK | input | Serial clock input with Schmitt trigger for ADC data transfer; suitable for optically isolated applications. |+| 4 | CS | input | Active-low chip select logic input for selecting ADC on shared serial bus. |+| 5 | P3 | output | General-purpose digital output pin referenced to AVDD-AGND, logic level controlled by P3DAT bit in GPOCON register. |+| 6 | P2 | output | General-purpose digital output pin referenced to AVDD-AGND, logic level controlled by P2DAT bit in GPOCON register. |+| 7 | P1/REFIN2(+) | tri_state | Tri-state general-purpose digital output (controlled by GP10EN) or positive reference input when REFSEL=1; reference voltage range 1V to AVDD. |+| 8 | P0/REFIN2(−) | tri_state | Tri-state general-purpose digital output (controlled by GP10EN) or negative reference input when REFSEL=1; reference voltage range AGND to (AVDD−1V). |+| 9 | NC | unconnected | No connect internal pin; should be connected externally to AGND. |+| 10 | AINCOM | input | Analog input common reference pin for pseudo-differential configuration of AIN1 through AIN4. |+| 11 | AIN1 | input | Analog input pin configurable as positive differential input with AIN2 or pseudo-differential input with AINCOM. |+| 12 | AIN2 | input | Analog input pin configurable as negative differential input with AIN1 or pseudo-differential input with AINCOM. |+| 13 | AIN3 | input | Analog input pin configurable as positive differential input with AIN4 or pseudo-differential input with AINCOM. |+| 14 | AIN4 | input | Analog input pin configurable as negative differential input with AIN3 or pseudo-differential input with AINCOM. |+| 15 | REFIN1(+) | input | Positive reference input pin; voltage range AGND+1V to AVDD; nominal differential reference voltage (REFIN1(+)−REFIN1(−)) is AVDD. |+| 16 | REFIN1(−) | input | Negative reference input pin; voltage range AGND to (AVDD−1V). |+| 17 | BPDSW | output | Bridge shutdown switch output (open-drain type), sinking to AGND with 30mA maximum continuous current when enabled via GPOCON register. |+| 18 | AGND | power_in | Analog ground reference point, internally connected to DGND through substrate. |+| 19 | DGND | power_in | Digital ground reference point, internally connected to AGND through substrate. |+| 20 | AVDD | power_in | Analog power supply voltage 3V to 5.25V, independent from DVDD. |+| 21 | DVDD | power_in | Digital power supply voltage 2.7V to 5.25V, independent from AVDD. |+| 22 | SYNC | input | Synchronization input with internal pull-up to DVDD; resets filter and modulator when low, allows multiple AD7192 device synchronization. |+| 23 | DOUT/RDY | output | Serial data output / data ready indicator pin; outputs serial data on SCLK edges when CS low, goes active-low when conversion complete. |+| 24 | DIN | input | Serial data input for control register access via communication register to configure device and read output data. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Analog Devices |+| Package | TSSOP-24 |+| Category | Data Acquisition |+| Pins | 24 |++## CAD (KiCad official)++- Symbol: `AD7192BRUZ-REEL`+- Footprint: `Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm`+- 3D model: TSSOP-24 (KiCad packages3D, STEP)+- 3D model files: `ad7192bruz-reel-etched.step` / `ad7192bruz-reel-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad7192bruz-reel.step` / `ad7192bruz-reel.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883615354654720) (40 pp, sha256 `a5a3bd40d4244678`, retrieved 2026-09-22, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ad7192bruz-reel-datasheet.pdf)
page.jsonadded+239@@ -0,0 +1,239 @@+{+ "slug": "ad7192bruz-reel",+ "version": "0.1.0",+ "type": "component",+ "description": "Analog Devices Analog To Digital Converters (ADC), TSSOP-24. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "ad7192bruz-reel",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ad7192bruz-reel.kicad_sym",+ "ad7192bruz-reel.kicad_mod",+ "ad7192bruz-reel.glb",+ "ad7192bruz-reel.step",+ "ad7192bruz-reel.lbr",+ "docs/hero.png",+ "docs/ad7192bruz-reel-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "AD7192BRUZ-REEL",+ "manufacturer": "Analog Devices",+ "package": "TSSOP-24",+ "pin_count": 24,+ "category": "Data Acquisition",+ "subcategory": "Analog To Digital Converters (ADC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883615354654720",+ "parts": {+ "symbol": "ad7192bruz-reel.kicad_sym",+ "footprint": "ad7192bruz-reel.kicad_mod",+ "model_3d": "ad7192bruz-reel-etched.glb",+ "model_3d_plain": "ad7192bruz-reel.glb",+ "model_3d_step": "ad7192bruz-reel-etched.step",+ "model_3d_step_plain": "ad7192bruz-reel.step",+ "lbr": "ad7192bruz-reel.lbr"+ },+ "distributor_links": {+ "lcsc": "C392902"+ },+ "pins": [+ {+ "number": "1",+ "name": "MCLK1",+ "type": "input",+ "description": "External master clock input used as crystal oscillator feedback when external crystal connected between MCLK1 and MCLK2."+ },+ {+ "number": "2",+ "name": "MCLK2",+ "type": "tri_state",+ "description": "Tri-state master clock pin supporting external crystal drive, external clock input, internal 4.92MHz clock output, or tri-state when not used."+ },+ {+ "number": "3",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input with Schmitt trigger for ADC data transfer; suitable for optically isolated applications."+ },+ {+ "number": "4",+ "name": "CS",+ "type": "input",+ "description": "Active-low chip select logic input for selecting ADC on shared serial bus."+ },+ {+ "number": "5",+ "name": "P3",+ "type": "output",+ "description": "General-purpose digital output pin referenced to AVDD-AGND, logic level controlled by P3DAT bit in GPOCON register."+ },+ {+ "number": "6",+ "name": "P2",+ "type": "output",+ "description": "General-purpose digital output pin referenced to AVDD-AGND, logic level controlled by P2DAT bit in GPOCON register."+ },+ {+ "number": "7",+ "name": "P1/REFIN2(+)",+ "type": "tri_state",+ "description": "Tri-state general-purpose digital output (controlled by GP10EN) or positive reference input when REFSEL=1; reference voltage range 1V to AVDD."+ },+ {+ "number": "8",+ "name": "P0/REFIN2(−)",+ "type": "tri_state",+ "description": "Tri-state general-purpose digital output (controlled by GP10EN) or negative reference input when REFSEL=1; reference voltage range AGND to (AVDD−1V)."+ },+ {+ "number": "9",+ "name": "NC",+ "type": "unconnected",+ "description": "No connect internal pin; should be connected externally to AGND."+ },+ {+ "number": "10",+ "name": "AINCOM",+ "type": "input",+ "description": "Analog input common reference pin for pseudo-differential configuration of AIN1 through AIN4."+ },+ {+ "number": "11",+ "name": "AIN1",+ "type": "input",+ "description": "Analog input pin configurable as positive differential input with AIN2 or pseudo-differential input with AINCOM."+ },+ {+ "number": "12",+ "name": "AIN2",+ "type": "input",+ "description": "Analog input pin configurable as negative differential input with AIN1 or pseudo-differential input with AINCOM."+ },+ {+ "number": "13",+ "name": "AIN3",+ "type": "input",+ "description": "Analog input pin configurable as positive differential input with AIN4 or pseudo-differential input with AINCOM."+ },+ {+ "number": "14",+ "name": "AIN4",+ "type": "input",+ "description": "Analog input pin configurable as negative differential input with AIN3 or pseudo-differential input with AINCOM."+ },+ {+ "number": "15",+ "name": "REFIN1(+)",+ "type": "input",+ "description": "Positive reference input pin; voltage range AGND+1V to AVDD; nominal differential reference voltage (REFIN1(+)−REFIN1(−)) is AVDD."+ },+ {+ "number": "16",+ "name": "REFIN1(−)",+ "type": "input",+ "description": "Negative reference input pin; voltage range AGND to (AVDD−1V)."+ },+ {+ "number": "17",+ "name": "BPDSW",+ "type": "output",+ "description": "Bridge shutdown switch output (open-drain type), sinking to AGND with 30mA maximum continuous current when enabled via GPOCON register."+ },+ {+ "number": "18",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference point, internally connected to DGND through substrate."+ },+ {+ "number": "19",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground reference point, internally connected to AGND through substrate."+ },+ {+ "number": "20",+ "name": "AVDD",+ "type": "power_in",+ "description": "Analog power supply voltage 3V to 5.25V, independent from DVDD."+ },+ {+ "number": "21",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital power supply voltage 2.7V to 5.25V, independent from AVDD."+ },+ {+ "number": "22",+ "name": "SYNC",+ "type": "input",+ "description": "Synchronization input with internal pull-up to DVDD; resets filter and modulator when low, allows multiple AD7192 device synchronization."+ },+ {+ "number": "23",+ "name": "DOUT/RDY",+ "type": "output",+ "description": "Serial data output / data ready indicator pin; outputs serial data on SCLK edges when CS low, goes active-low when conversion complete."+ },+ {+ "number": "24",+ "name": "DIN",+ "type": "input",+ "description": "Serial data input for control register access via communication register to configure device and read output data."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: MCLK1 classified as input—verify if passive is more appropriate for crystal oscillator feedback netw; P1/REFIN2(+) and P0/REFIN2(−) classified as tri_state for GPIO output mode with explicit tristating;; Analog inputs AIN1–AIN4 classified as input; optional 500nA excitation current source/sink feature e"+ ],+ "pages_sent": 40,+ "cost_usd": 0.5909,+ "at": "2026-09-22T06:23:55"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883615354654720",+ "pages": 40,+ "sha256": "a5a3bd40d4244678",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 24,+ "described": 24,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}