ad156b2

@@ -0,0 +1,68 @@+# AD156B2++**JieLi Tech** · Microcontrollers (MCU/MPU/SOC) · QFN-32(4x4)++AD156B2 from JieLi Tech, in a QFN-32(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PA1 | bidirectional | General-purpose I/O with 8 mA / 64 mA high-drive capability. Muxable functions: ADC1 (ADC input ch. 1), SPI0CLKB (SPI0 clock B), SD0CLKA (SD0 clock A), UART0RXB (UART0 data-in B), I2C_SCL(B), CAP2 (Timer2 capture). |+| 2 | PA0 | bidirectional | General-purpose I/O with internal pull-up (10 kΩ typ). Muxable functions: Long-Press Reset, ADC0 (ADC input ch. 0), UART0TXB (UART0 data-out B). Drive 8 mA / 64 mA (high drive). |+| 3 | VDDIO | power_out | Digital power rail / internal linear regulator output. Typical output 3.0 V (range 2.0-3.4 V) at VBAT = 3.7 V, 100 mA load. Requires external decoupling capacitor to VSS. |+| 4 | VBAT | power_in | Main battery power-supply input. Operating range 2.0-5.5 V (typ 3.7 V). Absolute max 5.5 V. |+| 5 | HPVDD | power_in | Class-D audio power-amplifier supply. Operating range up to 5.5 V (absolute max 5.5 V). Typically tied to VBAT via a bead/RC filter. |+| 6 | DACP | output | Class-D audio power-amplifier positive output (0.5 W). Drives one side of the speaker load in BTL configuration with DACN. |+| 7 | DACN/PB11 | bidirectional | Dual-function pin. Primary: Class-D APA negative output (BTL pair with DACP). Alternate: PB11 GPIO (I/O, 8 mA, high-voltage resistance) with OSCIB (crystal oscillator input B) function. |+| 8 | PB10 | bidirectional | General-purpose I/O with internal pull-up (default), 8 mA drive, high-voltage resistance. Alternate function MCLR (active-low master clear/reset, 0 effective). |+| 9 | PB9 | bidirectional | General-purpose I/O, 8 mA drive, high-voltage resistance. Muxable functions: SPI1DOD (SPI1 data-out D), UART1TRXB (UART1 data in/out B), I2C_SDA(D), CAP1 (Timer1 capture). |+| 10 | PB8 | bidirectional | General-purpose I/O, 8 mA drive, high-voltage resistance. Muxable functions: SPI1CLKD (SPI1 clock D), I2C_SCL(D), OSCIA (crystal oscillator input A). |+| 11 | PB7 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Alternate function SPI1DID (SPI1 data-in D). |+| 12 | PB6 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Alternate function SD0DATC (SD0 data C). |+| 13 | PB5 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: ADC13 (ADC input ch. 13), SD0CMDC (SD0 command C). |+| 14 | PB4 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: ADC12 (ADC input ch. 12), SD0CLKC (SD0 clock C). |+| 15 | PB3 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Alternate function TDM_MCLK (TDM master clock). |+| 16 | PB2 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: SPI1DIA (SPI1 data-in A), SD0DATB (SD0 data B), TDM_DAT. |+| 17 | PB1 | bidirectional | General-purpose I/O with internal pull-down (default), 8 mA / 64 mA high-drive capability. Muxable functions: ADC11 (ADC input ch. 11), SPI1DOA (SPI1 data-out A), SD0CMDB (SD0 command B), I2C_SDA(A), TDM_SYN. |+| 18 | PB0 | bidirectional | General-purpose I/O with internal pull-down (default), 8 mA / 64 mA high-drive capability. Muxable functions: ADC10 (ADC input ch. 10), SPI1CLKA (SPI1 clock A), SD0CLKB (SD0 clock B), I2C_SCL(A), TDM_CLK. |+| 19 | PA15 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: ADC9 (ADC input ch. 9), SPI1DOB (SPI1 data-out B), MCAP3 (Motor Timer3 capture). |+| 20 | PA14 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: ADC8 (ADC input ch. 8), SPI1CLKB (SPI1 clock B), CAP0 (Timer0 capture), MCAP2 (Motor Timer2 capture). |+| 21 | PA13 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: SPI1DIB (SPI1 data-in B), TMR1 (Timer1 clock in), MCAP1 (Motor Timer1 capture). |+| 22 | PA12 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Alternate function MPWM3 (PWM channel 3 output). |+| 23 | PA11 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: TMR0 (Timer0 clock in), MPWM2 (PWM channel 2 output). |+| 24 | PA10 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. No alternate function documented. |+| 25 | PA9 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. No alternate function documented. |+| 26 | PA8 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: SPI1DIC (SPI1 data-in C), SD0DATD (SD0 data D). |+| 27 | PA7 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: ADC7 (ADC input ch. 7), SPI1DOC (SPI1 data-out C), SD0CMDD (SD0 command D), UART0RXA (UART0 data-in A), I2C_SDA(C), MPWM1 (PWM channel 1 output). |+| 28 | PA6 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: ADC6 (ADC input ch. 6), SPI1CLKC (SPI1 clock C), SD0CLKD (SD0 clock D), UART0TXA (UART0 data-out A), I2C_SCL(C), TMR2 (Timer2 clock in), MPWM0 (PWM channel 0 output). |+| 29 | PA5 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: ADC5 (ADC input ch. 5), SPI0DAT3 (SPI0 data 3), UART1RXA (UART1 data-in A). |+| 30 | PA4 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: ADC4 (ADC input ch. 4), SPI0DAT2 (SPI0 data 2), UART1TXA (UART1 data-out A), LVD (low-voltage detect). |+| 31 | PA3 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: ADC3 (ADC input ch. 3), SPI0DIB(1) (SPI0 data1 in B), SD0DATA (SD0 data A), CLKOUT, PWM2(A), MCAP0 (Motor Timer0 capture). |+| 32 | PA2 | bidirectional | General-purpose I/O, 8 mA / 64 mA high-drive capability. Muxable functions: ADC2 (ADC input ch. 2), SPI0DOB(0) (SPI0 data0 out B), SD0CMDA (SD0 command A), I2C_SDA(B), PWM2(B). |+| PAD | VSS | power_in | Exposed thermal/ground pad on the underside of the QFN-32 package. Must be soldered to the PCB ground plane for both electrical ground return and thermal dissipation. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | JieLi Tech |+| Package | QFN-32(4x4) |+| Category | Embedded Processors & Controllers |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `AD156B2`+- Footprint: `Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm`+- 3D model: QFN-32(4x4) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [JieLi Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603393239609733120) (10 pp, sha256 `1743b94fba65bb37`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ad156b2-datasheet.pdf)

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