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acs724llctr-20ab-t: factory component page (tier=lcsc)

Ray ·0154bf3e98 ·2mo ago ·parent 96a04d4
1 file changed +116−8
page.json+116−8
@@ -1,13 +1,126 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "acs724llctr-20ab-t",+  "title": "ACS724LLCTR-20AB-T",+  "brief": "Allegro MicroSystems LLC Current Sensors, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Allegro MicroSystems LLC Current Sensors, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "sensor",     "acs724llctr-20ab-t"   ],+  "component": {+    "mpn": "ACS724LLCTR-20AB-T",+    "manufacturer": "Allegro MicroSystems LLC",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Sensor",+    "subcategory": "Current Sensors",+    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/e5b89cce73a3436ebaa2f3e8b43abb08.pdf",+    "parts": {+      "symbol": "acs724llctr-20ab-t.kicad_sym",+      "footprint": "acs724llctr-20ab-t.kicad_mod",+      "model_3d": "acs724llctr-20ab-t.glb",+      "model_3d_step": "acs724llctr-20ab-t.step",+      "lbr": "acs724llctr-20ab-t.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "IP+",+        "type": "passive",+        "description": "Primary current sense input (positive). Tied internally to pin 2 to form the fused primary conductor (~1.2 m\u03a9) through which the sensed current flows. Current flowing from pins 1,2 to pins 3,4 produces a positive VIOUT slope."+      },+      {+        "number": "2",+        "name": "IP+",+        "type": "passive",+        "description": "Primary current sense input (positive), internally connected to pin 1. Both pins 1 and 2 must be tied together on the PCB to carry the sensed current."+      },+      {+        "number": "3",+        "name": "IP-",+        "type": "passive",+        "description": "Primary current sense return (negative). Tied internally to pin 4 to form the fused primary conductor. Sensed current exits through pins 3 and 4."+      },+      {+        "number": "4",+        "name": "IP-",+        "type": "passive",+        "description": "Primary current sense return (negative), internally connected to pin 3. Both pins 3 and 4 must be tied together on the PCB. The IP+/IP- terminals are galvanically isolated (2400 VRMS) from the signal-side pins."+      },+      {+        "number": "5",+        "name": "GND",+        "type": "power_in",+        "description": "Signal ground terminal. Reference for VCC, VIOUT, and FILTER on the low-voltage side of the isolation barrier."+      },+      {+        "number": "6",+        "name": "FILTER",+        "type": "passive",+        "description": "External capacitor pin (CF) that, combined with the ~1.8 k\u03a9 internal filter resistor RF(int), sets the output bandwidth (default 120 kHz small-signal BW with CF = 1 nF). Reduces noise at lower bandwidths."+      },+      {+        "number": "7",+        "name": "VIOUT",+        "type": "output",+        "description": "Analog output signal, ratiometric to VCC. Zero-current output \u2248 VCC/2; sensitivity 100 mV/A for the \u00b120 A -20AB variant. Output impedance drives \u22654.7 k\u03a9 load; saturates near VCC-0.3 V (high) / 0.3 V (low)."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Device power supply terminal. 5 V single supply nominal (4.5 to 5.5 V operating range, 6 V absolute max). Typical supply current ICC = 10 mA. Bypass with 0.1 \u00b5F ceramic (CBYPASS) to GND."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://datasheet.lcsc.com/datasheet/pdf/e5b89cce73a3436ebaa2f3e8b43abb08.pdf",+        "pages": 25,+        "sha256": "1d287313108ead3b",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Allegro MicroSystems LLC",+      "Package": "SOIC-8",+      "Category": "Sensor",+      "Pins": "8"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "acs724llctr-20ab-t"+  ],+  "discovery_pitch": "ACS724LLCTR-20AB-T (Allegro MicroSystems LLC) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +138,5 @@     "docs/acs724llctr-20ab-t-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file