component
9DBL411BGLFT
Public Made by Adomby adom
RENESAS Clock Buffers, Drivers, Distributors, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+56@@ -0,0 +1,56 @@+# 9DBL411BGLFT++**RENESAS** · Clock Buffers, Drivers, Distributors · TSSOP-20++9DBL411BGLFT from RENESAS, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OE0# | input | Output Enable control for DIF0 differential output pair; 0 = enabled, 1 = tristate (Low-Low). |+| 2 | DIF_INC | input | Complement side of differential input clock. |+| 3 | DIF_INT | input | True side of differential input clock. |+| 4 | VDDA | power_in | 3.3V analog core supply voltage. |+| 5 | GNDA | power_in | Ground for analog core. |+| 6 | OE3# | input | Output Enable control for DIF3 differential output pair; 0 = enabled, 1 = tristate (Low-Low). |+| 7 | DIF3C_LPR | output | Complement clock of low power differential output pair DIF3 (no 50 ohm shunt resistor to ground required). |+| 8 | DIF3T_LPR | output | True clock of low power differential output pair DIF3 (no 50 ohm shunt resistor to ground required). |+| 9 | VDD_IO | power_in | Power supply for low power differential outputs, 1.05V to 3.3V nominal. |+| 10 | GND | power_in | Ground pin. |+| 11 | DIF2C_LPR | output | Complement clock of low power differential output pair DIF2 (no 50 ohm shunt resistor to ground required). |+| 12 | DIF2T_LPR | output | True clock of low power differential output pair DIF2 (no 50 ohm shunt resistor to ground required). |+| 13 | OE2# | input | Output Enable control for DIF2 differential output pair; 0 = enabled, 1 = tristate (Low-Low). |+| 14 | DIF1C_LPR | output | Complement clock of low power differential output pair DIF1 (no 50 ohm shunt resistor to ground required). |+| 15 | DIF1T_LPR | output | True clock of low power differential output pair DIF1 (no 50 ohm shunt resistor to ground required). |+| 16 | OE1# | input | Output Enable control for DIF1 differential output pair; 0 = enabled, 1 = tristate (Low-Low). |+| 17 | GND | power_in | Ground pin. |+| 18 | VDD_IO | power_in | Power supply for low power differential outputs, 1.05V to 3.3V nominal. |+| 19 | DIF0C_LPR | output | Complement clock of low power differential output pair DIF0 (no 50 ohm shunt resistor to ground required). |+| 20 | DIF0T_LPR | output | True clock of low power differential output pair DIF0 (no 50 ohm shunt resistor to ground required). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | RENESAS |+| Package | TSSOP-20 |+| Category | Clock/Timing |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `9DBL411BGLFT`+- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`+- 3D model: TSSOP-20 (KiCad packages3D, STEP)+- 3D model files: `9dbl411bglft-etched.step` / `9dbl411bglft-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `9dbl411bglft.step` / `9dbl411bglft.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [RENESAS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588930199702949888) (10 pp, sha256 `70fa6701e0fc6ed5`, retrieved 2026-09-18, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/9dbl411bglft-datasheet.pdf)
page.jsonadded+213@@ -0,0 +1,213 @@+{+ "slug": "9dbl411bglft",+ "version": "0.1.0",+ "type": "component",+ "description": "RENESAS Clock Buffers, Drivers, Distributors, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "clock-timing",+ "9dbl411bglft",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "9dbl411bglft.kicad_sym",+ "9dbl411bglft.kicad_mod",+ "9dbl411bglft.glb",+ "9dbl411bglft.step",+ "9dbl411bglft.lbr",+ "docs/hero.png",+ "docs/9dbl411bglft-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "9DBL411BGLFT",+ "manufacturer": "RENESAS",+ "package": "TSSOP-20",+ "pin_count": 20,+ "category": "Clock/Timing",+ "subcategory": "Clock Buffers, Drivers, Distributors",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588930199702949888",+ "parts": {+ "symbol": "9dbl411bglft.kicad_sym",+ "footprint": "9dbl411bglft.kicad_mod",+ "model_3d": "9dbl411bglft-etched.glb",+ "model_3d_plain": "9dbl411bglft.glb",+ "model_3d_step": "9dbl411bglft-etched.step",+ "model_3d_step_plain": "9dbl411bglft.step",+ "lbr": "9dbl411bglft.lbr"+ },+ "distributor_links": {+ "lcsc": "C2649348"+ },+ "pins": [+ {+ "number": "1",+ "name": "OE0#",+ "type": "input",+ "description": "Output Enable control for DIF0 differential output pair; 0 = enabled, 1 = tristate (Low-Low)."+ },+ {+ "number": "2",+ "name": "DIF_INC",+ "type": "input",+ "description": "Complement side of differential input clock."+ },+ {+ "number": "3",+ "name": "DIF_INT",+ "type": "input",+ "description": "True side of differential input clock."+ },+ {+ "number": "4",+ "name": "VDDA",+ "type": "power_in",+ "description": "3.3V analog core supply voltage."+ },+ {+ "number": "5",+ "name": "GNDA",+ "type": "power_in",+ "description": "Ground for analog core."+ },+ {+ "number": "6",+ "name": "OE3#",+ "type": "input",+ "description": "Output Enable control for DIF3 differential output pair; 0 = enabled, 1 = tristate (Low-Low)."+ },+ {+ "number": "7",+ "name": "DIF3C_LPR",+ "type": "output",+ "description": "Complement clock of low power differential output pair DIF3 (no 50 ohm shunt resistor to ground required)."+ },+ {+ "number": "8",+ "name": "DIF3T_LPR",+ "type": "output",+ "description": "True clock of low power differential output pair DIF3 (no 50 ohm shunt resistor to ground required)."+ },+ {+ "number": "9",+ "name": "VDD_IO",+ "type": "power_in",+ "description": "Power supply for low power differential outputs, 1.05V to 3.3V nominal."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin."+ },+ {+ "number": "11",+ "name": "DIF2C_LPR",+ "type": "output",+ "description": "Complement clock of low power differential output pair DIF2 (no 50 ohm shunt resistor to ground required)."+ },+ {+ "number": "12",+ "name": "DIF2T_LPR",+ "type": "output",+ "description": "True clock of low power differential output pair DIF2 (no 50 ohm shunt resistor to ground required)."+ },+ {+ "number": "13",+ "name": "OE2#",+ "type": "input",+ "description": "Output Enable control for DIF2 differential output pair; 0 = enabled, 1 = tristate (Low-Low)."+ },+ {+ "number": "14",+ "name": "DIF1C_LPR",+ "type": "output",+ "description": "Complement clock of low power differential output pair DIF1 (no 50 ohm shunt resistor to ground required)."+ },+ {+ "number": "15",+ "name": "DIF1T_LPR",+ "type": "output",+ "description": "True clock of low power differential output pair DIF1 (no 50 ohm shunt resistor to ground required)."+ },+ {+ "number": "16",+ "name": "OE1#",+ "type": "input",+ "description": "Output Enable control for DIF1 differential output pair; 0 = enabled, 1 = tristate (Low-Low)."+ },+ {+ "number": "17",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin."+ },+ {+ "number": "18",+ "name": "VDD_IO",+ "type": "power_in",+ "description": "Power supply for low power differential outputs, 1.05V to 3.3V nominal."+ },+ {+ "number": "19",+ "name": "DIF0C_LPR",+ "type": "output",+ "description": "Complement clock of low power differential output pair DIF0 (no 50 ohm shunt resistor to ground required)."+ },+ {+ "number": "20",+ "name": "DIF0T_LPR",+ "type": "output",+ "description": "True clock of low power differential output pair DIF0 (no 50 ohm shunt resistor to ground required)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 10,+ "cost_usd": 0.1498,+ "at": "2026-09-18T06:17:18"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588930199702949888",+ "pages": 10,+ "sha256": "70fa6701e0fc6ed5",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}