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pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)

Ray ·3b14bdf1a0 · ·parent eeee3ea
2 files changed +267−1
package.json+2−1
@@ -24,6 +24,7 @@     "docs/hero.png",     "docs/8002a-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ] }\ No newline at end of file
pads.jsonadded+265
@@ -0,0 +1,265 @@+{+ "schema": "adom.pads/1",+ "slug": "8002a",+ "footprint": "SOIC-8_3.9x4.9mm_P1.27mm",+ "generated_from": {+  "footprint": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",+  "pins": "page.json:component.pins",+  "overrides": null+ },+ "pin1": {+  "pad": "1",+  "at": [+   -2.475,+   -1.905+  ],+  "corner": "top-left",+  "source": "silk-marker",+  "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4"+ },+ "pad_count": 8,+ "paste_apertures": 0,+ "issues": [],+ "pads": [+  {+   "pad": "1",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "1",+   "name": "SD",+   "type": "input",+   "description": "Shutdown control input. Logic HIGH (VIH = 1.5V to VDD) disables the amplifier and puts the chip into low-power mode (~10μA typical, 16μA max); logic LOW (VIL = 0 to 1V) enables normal operation. Pin is high-impedance internally with no pull-up/pull-down - must not be left floating (tie to GND if unused).",+   "is_pin1": true,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "2",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "2",+   "name": "BYP",+   "type": "passive",+   "description": "Bypass pin - internal VDD/2 mid-supply reference output. Connect a bypass capacitor (typ. 1μF) from this pin to GND to filter the mid-rail reference and improve PSRR and low-frequency THD+N.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "3",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "3",+   "name": "NC",+   "type": "unconnected",+   "description": "No connection. Datasheet features list explicitly states '芯片第3脚无功能' (Pin 3 has no function). Leave unconnected on the PCB.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "4",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "4",+   "name": "INN",+   "type": "input",+   "description": "Inverting analog audio input to the input op-amp stage. Closed-loop gain of the first stage is set by external Rf (feedback) and Ri (input) resistors; overall differential BTL gain AVD = 2*(Rf/Ri). AC-couple the source through Ci (typ. 0.39μF) which forms a high-pass filter with Ri (fC = 1/(2πRiCi)).",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "5",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "5",+   "name": "VO1",+   "type": "output",+   "description": "Analog audio output 1 (one side of the bridge-tied-load speaker output). Biased at VDD/2 mid-rail; drives one terminal of the 4Ω or 8Ω speaker directly with no output coupling capacitor required. Signal is 180° out of phase with VO2.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "6",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "6",+   "name": "VDD",+   "type": "power_in",+   "description": "Positive supply input. Recommended operating range 2.0V to 5.5V (absolute max 6V). Quiescent supply current IDD ≈ 15mA (no load, VDD=5V). Decouple with 10μF and 0.1μF capacitors placed close to the pin.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "7",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "7",+   "name": "GND",+   "type": "power_in",+   "description": "Power ground / analog ground return for the amplifier.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "8",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "8",+   "name": "VO2",+   "type": "output",+   "description": "Analog audio output 2 (other side of the bridge-tied-load speaker output). Biased at VDD/2 mid-rail; the internal second-stage op-amp is fixed at unity inverting gain via two internal 20kΩ resistors, so VO2 is 180° out of phase with VO1. Connect the speaker directly between VO1 and VO2.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  }+ ]+}\ No newline at end of file