8002A

@@ -32,6 +32,20 @@ - Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm` - 3D model: SOP-8 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`8002a.step`](8002a.step) | 122 KB | You want the bare part, or you mark your own boards. |+| [`8002a-etched.step`](8002a-etched.step) | 1.6 MB | You want the part with `8002A` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 381 faces against 147 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance  Data extracted from the manufacturer datasheet, not a distributor listing:

@@ -1,6 +1,6 @@ {   "slug": "8002a",-  "version": "0.1.0",+  "version": "0.2.0",   "type": "component",   "description": "IDCHIP Audio Power OpAmps, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "tags": [

@@ -4,7 +4,7 @@   "slug": "8002a",   "title": "8002A",   "brief": "IDCHIP Audio Power OpAmps, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.2.0",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -34,37 +34,37 @@         "number": "1",         "name": "SD",         "type": "input",-        "description": "Shutdown control input. Logic HIGH (VIH = 1.5V to VDD) disables the amplifier and puts the chip into low-power mode (~10\u03bcA typical, 16\u03bcA max); logic LOW (VIL = 0 to 1V) enables normal operation. Pin is high-impedance internally with no pull-up/pull-down - must not be left floating (tie to GND if unused)."+        "description": "Shutdown control input. Logic HIGH (VIH = 1.5V to VDD) disables the amplifier and puts the chip into low-power mode (~10μA typical, 16μA max); logic LOW (VIL = 0 to 1V) enables normal operation. Pin is high-impedance internally with no pull-up/pull-down - must not be left floating (tie to GND if unused)."       },       {         "number": "2",         "name": "BYP",         "type": "passive",-        "description": "Bypass pin - internal VDD/2 mid-supply reference output. Connect a bypass capacitor (typ. 1\u03bcF) from this pin to GND to filter the mid-rail reference and improve PSRR and low-frequency THD+N."+        "description": "Bypass pin - internal VDD/2 mid-supply reference output. Connect a bypass capacitor (typ. 1μF) from this pin to GND to filter the mid-rail reference and improve PSRR and low-frequency THD+N."       },       {         "number": "3",         "name": "NC",         "type": "unconnected",-        "description": "No connection. Datasheet features list explicitly states '\u82af\u7247\u7b2c3\u811a\u65e0\u529f\u80fd' (Pin 3 has no function). Leave unconnected on the PCB."+        "description": "No connection. Datasheet features list explicitly states '芯片第3脚无功能' (Pin 3 has no function). Leave unconnected on the PCB."       },       {         "number": "4",         "name": "INN",         "type": "input",-        "description": "Inverting analog audio input to the input op-amp stage. Closed-loop gain of the first stage is set by external Rf (feedback) and Ri (input) resistors; overall differential BTL gain AVD = 2*(Rf/Ri). AC-couple the source through Ci (typ. 0.39\u03bcF) which forms a high-pass filter with Ri (fC = 1/(2\u03c0RiCi))."+        "description": "Inverting analog audio input to the input op-amp stage. Closed-loop gain of the first stage is set by external Rf (feedback) and Ri (input) resistors; overall differential BTL gain AVD = 2*(Rf/Ri). AC-couple the source through Ci (typ. 0.39μF) which forms a high-pass filter with Ri (fC = 1/(2πRiCi))."       },       {         "number": "5",         "name": "VO1",         "type": "output",-        "description": "Analog audio output 1 (one side of the bridge-tied-load speaker output). Biased at VDD/2 mid-rail; drives one terminal of the 4\u03a9 or 8\u03a9 speaker directly with no output coupling capacitor required. Signal is 180\u00b0 out of phase with VO2."+        "description": "Analog audio output 1 (one side of the bridge-tied-load speaker output). Biased at VDD/2 mid-rail; drives one terminal of the 4Ω or 8Ω speaker directly with no output coupling capacitor required. Signal is 180° out of phase with VO2."       },       {         "number": "6",         "name": "VDD",         "type": "power_in",-        "description": "Positive supply input. Recommended operating range 2.0V to 5.5V (absolute max 6V). Quiescent supply current IDD \u2248 15mA (no load, VDD=5V). Decouple with 10\u03bcF and 0.1\u03bcF capacitors placed close to the pin."+        "description": "Positive supply input. Recommended operating range 2.0V to 5.5V (absolute max 6V). Quiescent supply current IDD ≈ 15mA (no load, VDD=5V). Decouple with 10μF and 0.1μF capacitors placed close to the pin."       },       {         "number": "7",@@ -76,7 +76,7 @@         "number": "8",         "name": "VO2",         "type": "output",-        "description": "Analog audio output 2 (other side of the bridge-tied-load speaker output). Biased at VDD/2 mid-rail; the internal second-stage op-amp is fixed at unity inverting gain via two internal 20k\u03a9 resistors, so VO2 is 180\u00b0 out of phase with VO1. Connect the speaker directly between VO1 and VO2."+        "description": "Analog audio output 2 (other side of the bridge-tied-load speaker output). Biased at VDD/2 mid-rail; the internal second-stage op-amp is fixed at unity inverting gain via two internal 20kΩ resistors, so VO2 is 180° out of phase with VO1. Connect the speaker directly between VO1 and VO2."       }     ],     "provenance": {@@ -150,9 +150,9 @@     "docs/hero.png",     "docs/8002a-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ],-  "visibility": {-    "public": true-  }+  "visibility": "public",+  "description": "IDCHIP Audio Power OpAmps, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D." }\ No newline at end of file